Datasheet

LTM4601/LTM4601-1
7
4601fd
For more information www.linear.com/LTM4601
pin FuncTions
(See Package Description for Pin Assignment)
V
IN
(Bank 1): Power Input Pins. Apply input voltage be-
tween these pins and PGND pins. Recommend placing
input decoupling capacitance directly between V
IN
pins
and PGND pins.
V
OUT
(Bank 3): Power Output Pins. Apply output load
between these pins and PGND pins. Recommend placing
output decoupling capacitance directly between these pins
and PGND pins. See Figure 15.
PGND (Bank 2): Power ground pins for both input and
output returns.
V
OSNS
–
(Pin M12): (–) Input to the Remote Sense Ampli-
fier. This pin connects to the ground remote sense point.
The remote sense amplifier is used for V
OUT
≤3.3V. Tie to
INTV
CC
if not used.
NC1 (Pin M12): No internal connection on the LTM4601-1.
V
OSNS
+
(Pin J12): (+) Input to the Remote Sense Ampli-
fier. This pin connects to the output remote sense point.
The remote sense amplifier is used for V
OUT
≤3.3V. Tie to
ground if not used.
NC2 (Pin J12): No internal connection on the LTM4601-1.
DIFFV
OUT
(Pin K12): Output of the Remote Sense Ampli-
fier. This pin connects to the V
OUT_LCL
pin. Leave floating
if not used.
NC3 (Pin K12): No internal connection on the LTM4601-1.
DRV
CC
(Pin E12): This pin normally connects to INTV
CC
for powering the internal MOSFET drivers. This pin can be
biased up to 6V from an external supply with about 50mA
capability, or an external circuit as shown in Figure 16.
This improves efficiency at the higher input voltages by
reducing power dissipation in the module.
INTV
CC
(Pin A7): This pin is for additional decoupling of
the 5V internal regulator.
PLLIN (Pin A8): External Clock Synchronization Input
to the Phase Detector. This pin is internally terminated
to SGND with a 50k resistor. Apply a clock with a high
level above 2V and below INTV
CC
. See the Applications
Information section.
TRACK/SS (Pin A9): Output Voltage Tracking and Soft-
Start Pin. When the module is configured as a master
output, then a soft-start capacitor is placed from this pin
to ground to control the master ramp rate. A soft-start
capacitor can also be used for soft-start turn-on of a stand
alone regulator. Slave operation is performed by putting
a resistor divider from the master output to the ground,
and connecting the center point of the divider to this pin.
See the Applications Information section.
MPGM (Pin A12): Programmable Margining Input. A re
-
sistor from this pin to ground sets a current that is equal
to 1.18V/R. This current multiplied by 10kW will equal a
value in millivolts that is a percentage of the 0.6V refer
-
ence voltage. See the Applications Information section.
To parallel LTM4601s, each requires an individual MPGM
resistor. Do not tie MPGM pins together.
f
SET
(Pin B12): Frequency Set Internally to 850kHz. An
external resistor can be placed from this pin to ground
to increase frequency. See the Applications Information
section for frequency adjustment.
V
FB
(Pin F12): The Negative Input of the Error Amplifier.
Internally, this pin is connected to V
OUT_LCL
pin with a
60.4k precision resistor. Different output voltages can be
programmed with an additional resistor between V
FB
and
SGND pins. See the Applications Information section.
MARG0 (Pin C12): This pin is the LSB logic input for the
margining function. Together with the MARG1 pin it will
determine if margin high, margin low or no margin state
is applied. The pin has an internal pull-down resistor of
50k. See the Applications Information section.
MARG1 (Pin D12): This pin is the MSB logic input for the
margining function. Together with the MARG0 pin it will
determine if margin high, margin low or no margin state
is applied. The pin has an internal pull-down resistor of
50k. See the Applications Information section.