Datasheet
Table Of Contents
- Features
- Applications
- Description
- Typical Application
- Absolute Maximum Ratings
- Pin Configuration
- Order Information
- Electrical Characteristics
- Typical Performance Characteristics
- Pin Functions
- Simplified Block Diagram
- Decoupling Requirements
- Operation
- Applications Information
- Typical Applications
- Package Description
- Revision History
- Package Photo
- Related Parts

LTM4601/LTM4601-1
20
4601fd
For more information www.linear.com/LTM4601
Layout Checklist/Example
The high integration of LTM4601 makes the PCB board
layout very simple and easy. However, to optimize its electri
-
cal and thermal performance, some layout considerations
are still necessary.
• Use large PCB copper areas for high current path, in
-
cluding V
IN
, PGND and V
OUT
. It helps to minimize the
PCB conduction loss and thermal stress.
• Place high frequency ceramic input and output capaci
-
tors next to the V
IN
, PGND and V
OUT
pins to minimize
high frequency noise.
• Place a dedicated power ground layer underneath the
unit. Refer frequency synchronization source to power
ground.
• To minimize the via conduction loss and reduce module
thermal stress, use multiple vias for interconnection
between top layer and other power layers.
• Do not put vias directly on pads unless they are capped.
• Use a separated SGND copper area for components
connected to signal pins. Connect the SGND to PGND
underneath the unit.
Figure 15 gives a good example of the recommended layout.
Frequency Adjustment
The LTM4601 is designed to typically operate at 850kHz
across most input conditions. The f
SET
pin is normally
left open. The switching frequency has been optimized
for maintaining constant output ripple noise over most
operating ranges. The 850kHz switching frequency and
the 400ns minimum off time can limit operation at higher
duty cycles like 5V to 3.3V, and produce excessive induc
-
tor ripple currents for lower duty cycle applications like
20V to 5V. The 5V
OUT
and 3.3V
OUT
drop out curves are
modified by adding an external resistor on the f
SET
pin to
allow for lower input voltage operation, or higher input
voltage operation.
SIGNAL
GND
V
OUT
V
IN
GND
C
OUT
C
IN
C
IN
C
OUT
4601 F15
Figure 15. Recommended Layout (LGA and BGA PCB Layouts Are Identical
with the Exception of Circle Pads for BGA, See Package Description.)
applicaTions inForMaTion