Datasheet

QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1029

Multi Channel Power Supply Sequencer and Supervisor

OPERATING PRINCIPLES

A single LTC2928 can control four positive supplies or

three positive and one negative.

Each supply timing position in the sequence can be any

one of the eight available time positions. Refer to the

data sheet for the external resistor values for setting the

sequence time position.

Power is applied to the LTC2928 through either the Vcc

pin (2.9V to 6V) or the HVcc pin (7.2V to 16.5V).

Each one of the four enable outputs (EN1, EN2, EN3,

EN4) provides a (Vcc+4.5)V signal to control a MOSFET

gate or a power supply enable input.

The LTC2928 monitors four supply thresholds per sup-

ply (sequence-up, sequence-down, undervoltage, over-

voltage) during a full LTC2928 operation cycle. A full

operation cycle includes two transient phases (se-

quence-up and sequence-down) and one monitor

(steady state) phase.

The time intervals between adjacent supplies’ enable or

disable signal is set by the value of the Sequence Timer

capacitor with a timing scale factor of 8670ms/uF. The

sequencing-up interval is equal to the sequencing-down

interval.

The power good timer period defines the maximum

time needed by any input supply to reach its undervolt-

age threshold (in power-up) or drop to its sequencing-

down threshold (in power-down). This period is set by a

power good timer capacitor with a timing scale factor of

4000ms/uF.

During the sequence-up phase, supply monitor inputs

are expected to cross their sequence-up threshold

(which may be different from their undervoltage thresh-

old). Any supply monitor input failing to cross its se-

quence-up threshold will stall the process and a se-

quence-up fault is generated.

During the sequence-down phase, supply monitor in-

puts are expected to cross their sequence-down

threshold (which can be different from their undervolt-

age threshold) within the selected power good time.

Any supply monitor input failing to cross its sequence-

down threshold will stall the process and generate a

sequence-down fault.

Refer to the LTC2928 data sheet for sequencing thresh-

old selection by biasing the SQT1 and SQT2 pins.