Datasheet

ADV7390/ADV7391/ADV7392/ADV7393 Data Sheet
Rev. J | Page 42 of 107
SR7 to Bit Number
1
Reset
SR0 Register Bit Description 7 6 5 4 3 2 1 0 Register Setting Value
SD CGMS data x x CGMS Data Bits[C15:C14]
0x9B
SD CGMS/WSS 2
SD CGMS/WSS data
x
x
x
x
x
x
x
x
CGMS Data Bits[C7:C0] or
WSS Data Bits[W7:W0]
0x00
0x9C SD scale LSB LSBs for SD Y scale value x x SD Y Scale Bits[1:0] 0x00
LSBs for SD Cb scale value x x SD Cb Scale Bits[1:0]
LSBs for SD Cr scale value
x
x
SD Cr Scale Bits[1:0]
LSBs for SD F
SC
phase x x Subcarrier Phase Bits[1:0]
0x9D SD Y scale SD Y scale value x x x x x x x x SD Y Scale Bits[9:2] 0x00
0x9E SD Cb scale SD Cb scale value x x x x x x x x SD Cb Scale Bits[9:2] 0x00
0x9F SD Cr scale SD Cr scale value x x x x x x x x SD Cr Scale Bits[9:2] 0x00
0xA0 SD hue adjust SD hue adjust value x x x x x x x x SD Hue Adjust Bits[7:0] 0x00
0xA1 SD brightness/WSS SD brightness value x x x x x x x SD Brightness Bits[6:0] 0x00
SD blank WSS data 0 Disabled
1
Enabled
0xA2 SD luma SSAF SD luma SSAF gain/attenuation
(only applicable if Subaddress
0x87, Bit 4 = 1)
0 0 0 0 −4 dB 0x00
… … … … …
0 1 1 0 0 dB
… … … … …
1
1
0
0
+4 dB
Reserved 0 0 0 0
0xA3 SD DNR 0 Coring gain border (in DNR
mode, the values in brackets
apply)
0 0 0 0 No gain 0x00
0 0 0 1 +1/16 [−1/8]
0 0 1 0 +2/16 [−2/8]
0
0
1
1
+3/16 [−3/8]
0 1 0 0 +4/16 [−4/8]
0 1 0 1 +5/16 [−5/8]
0 1 1 0 +6/16 [−6/8]
0 1 1 1 +7/16 [−7/8]
1 0 0 0 +8/16 [−1]
Coring gain data (in DNR
mode, the values in brackets
apply)
0 0 0 0 No gain
0 0 0 1 +1/16 [−1/8]
0 0 1 0 +2/16 [−2/8]
0
0
1
1
+3/16 [−3/8]
0 1 0 0 +4/16 [−4/8]
0 1 0 1 +5/16 [−5/8]
0 1 1 0 +6/16 [−6/8]
0 1 1 1 +7/16 [−7/8]
1 0 0 0 +8/16 [−1]
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