User's Manual

Address:Lierda Building, 425 Dengyun Road, Hangzhou, China,Lierda Science & Technology Group Co., Ltd
Tel:0
571-89908723 Fax:[phone]
4 Application reference
4.1 Reference design
GPIO_24
44
GPIO_28_TCK
45
GPIO_29
46
GND10
47
GND11
48
GND12
49
GND13
50
GND14
51
GND15
52
GND16
53
GND17
54
GPIO_08
27
UART 0_T X/ GPI O_07
26
UART 1_CT S/ GPIO_ 06
25
WL_DBG_TX/GPIO_05
24
RS232_RX/GPIO_04
23
RS232_TX/GPIO_03
22
UART1_RX/GPIO_02
21
UART 1_T X/ GPI O_01
20
GND
19
EXT_32K
18
UART1_RTS/GPIO_00
17
GND18
55
FLASH_SPI_CLK
42
FLASH_SPI_CS
41
FLASH_SPI_DIN
40
GPIO_23
39
HOST_INTR
38
GPIO_13/I2C_SDA
37
GPIO_12/I2C_SCL
36
HOST_SPI_CS
35
HOST_SPI_DO
34
HOST_SPI_DI
33
HOST_SPI_CLK
32
nHIB/GPIO_11
31
GPIO_10
30
GND
29
RF_BG
2
GND
3
40M_OSC_BUFF
4
RF_A
5
TCXO_EN/GPIO_25
6
GPIO_28
7
VDD_ANA_OUT
8
SOP0
9
RESET
10
VBAT_IN3
11
VBAT_IN2
12
VBAT_IN
13
GPIO30
15
VDD_FLASH
14
VDD_ANA_IN
16
GND
1
FLASH_SPI_DOUT
43
GPIO_09
28
CC3200 MODULE
RF
UART _T X
UART _RX
Sleep/CC_GPIO_08
Ready/CC_GPIO_09
Link/CC_GPIO_10
Reloard/CC_GPIO_11
CC_JTAG_TDI
SOP2
CC_JTAG_TMS
CC_JTAG_TCK
CC_JTAG_TDO
CC_nRESET
J1
R3
1K
VCC
VCC
S1
SW- Q
R1
100K
R2
100R
C3
33nF/16V
VCC
GND
for JTAG
EL 1
0
MODE update/down load FW normal
for UART
A K
LED1
R5
10K
CC_ GPIO_XX
Q1
8050-S
R4
270R
VCC
GND
IO port for LED using
Powe r :DC_3. 3V
Please add decoupling capacitor
for RESET
0R
L1
NC
C1
NC
C2
50 Ohm RF trace
ANT
for ANT matching
for state control
connect to IO ports of MCU
connect to UART ports of MCU
GNDGND
GND
GND
GND GND
Figure 5 Reference design