User Manual
Table Of Contents
- Chapter 1: Product Overview 1
- Chapter 2: Configuration & Testing 19
- Chapter 3: Development Environment 27
- Product Overview
- Introduction
- Performance Specifications
- Electrical Interface
- Pin Functions
- Pin 1 (VIN)
- Pin 2 (LPP TX) and Pin 3 (LPP RX)
- Pin 4 (DIGITAL_IO1) and Pin 11 (DIGITAL_IO2)
- Pin 5 (ANALOG_IN1) and Pin 10 (ANALOG_IN2)
- Pins 6 and 7 (GND)
- Pin 8 (LOW_RF_POWER)
- Pin 9 (PWR_DN)
- Pin 12 (TPP RX) and Pin 13 (TPP TX)
- Pin 14 (3.3V_Logic_supply)
- USB Programming Cable
- USB Cable Installation
- Antennas
- External Antenna
- On-board Antenna
- Additional Specifications
- Dimensions: Gridstream S4SBR 25-1681 / 25-1682
- Dimensions: Gridstream S4SBR 25-1683 / 25-1684
- Configuration & Testing
- Development Environment
- Gridstream SCADA/DA Series 4 Single Board Radio Interface Board
- Transparent Port (TPP) Connection
- LAN Packet Port (LPP) Connection
- Onboard Regulator
- Digital Input
- Analog Input
- General Usage Instruction
- Gridstream S4SBR Logic
- Control Register 1
- Control Register 2
- Digital I/O Functionality
- Analog Input Functionality
- Memory Location
- Manufacturer Contact Information
- External Antenna Specifications
- Ground Plane Specifications
- RF External Antenna Cable Specifications
- External Antenna Radiation Pattern
- Identifying a Reverse-Polarity Connector
- Specifications
- On-board Antenna Radiation Pattern
- FCC Class B
- RF Exposure
- Industry Canada
- Host FCC Label Requirement
- Data Sheets
- Whip Antenna P/N 16-1000-0
- RF External Antenna Cable P/N 21-1000-0
Chapter 1 - Product Overview Landis+Gyr
8 98-1138 Rev AD Gridstream SCADA/DA S4SBR
Pin 2 (LPP TX) and Pin 3 (LPP RX)
These pins are used to interface with the device's LAN Packet Port. These pins are driven at TTL
level supply, 2.5 VDC.
Baud rates on this port default to 9,600 bps but, using RadioShop, are configurable from 1,200 bps to
115,200 bps.
To reduce chances of electrical damage, a 10Kohm series resistor is placed in-series with the pin
which limits the drive current capability of this pin.
Stray physical capacitance on this circuit should be kept below 250[pF].
NOTE: These pins should NOT be directly connected to an RS-232 interface on a computer. Where
such a connection is necessary, the developer must connect to the unit through an externally-
powered TTL to RS-232 VDC converter, NOT via the pins or the RS-232 connection on the
computer.
Pin 4 (DIGITAL_IO1) and Pin 11 (DIGITAL_IO2)
These pins are general purpose digital I/O lines and are driven at TTL supply levels.
If not used, they should not be left unconnected and should be held low by connecting the pin to a
common ground.
If used, these pins must be driven to a valid logic high or low and not left at intermediate voltages as
this will result in indeterminate logic values and may damage the device.
draft 29 Jan 2013