User's Manual
Table Of Contents
- FEATURES
- APPLICATIONS
- DESCRIPTION
- ORDERING INFORMATION
- MODULE ACCESSORIES
- BLOCK DIAGRAM
- FUNCTIONAL BLOCK FEATURES
- TIWI-SL MODULE FOOTPRINT AND PIN DEFINITIONS
- PIN DESCRIPTIONS
- ELECTRICAL SPECIFICATIONS
- DEVICE POWER-UP AND ENABLE
- SPI HOST-CONTROLLER INTERFACE
- SOLDERING RECOMMENDATIONS
- CLEANING
- OPTICAL INSPECTION
- REWORK
- SHIPPING, HANDLING, AND STORAGE
- AGENCY CERTIFICATIONS
- AGENCY STATEMENTS
- OEM RESPONSIBILITIES TO COMPLY WITH FCC AND INDUSTRY CANADA REGULATIONS
- OEM LABELING REQUIREMENTS FOR END-PRODUCT
- OEM END PRODUCT USER MANUAL STATEMENTS
- MECHANICAL DATA
- DEVICE MARKINGS
- CONTACTING LS RESEARCH
TiWi-SL MODULE
DATASHEET
The information in this document is subject to change without notice.
Confirm the data is current by downloading the latest revision from www.lsr.com.
330-0085-R0.4 Copyright © 2011 LS Research, LLC Page 17 of 36
Port Name Input/Output Description
SPI_CLK Input Clock (0 MHz to 38.4MHz) from host to device
SPI_DI Input Data from host to device
SPI_CS Input CS signal from host to device
SPI_IRQ Output Interrupt from device to host
SPI_DO Output Data from device to host
Table 11: SPI Interface Signals Description
/CS and Bus Sharing Operation
The /CS line selects a specific device on the shared SPI bus. /CS is asserted at the beginning of an
SPI transaction and de-asserted when the transaction completes; /CS must not be de-asserted during
the transaction.
Bus sharing by multiple devices is implemented by asserting one /CS signal at a time and performing
transactions with a specific device. Device multiplexing is performed on a transaction basis rather than
on a byte or word basis.
SPI Transactions
NOTE
The first command to be sent to the device requires special consideration.
Write/Read Transactions
16-Bit Alignment
All data sent or received over the SPI interface are 16-bit aligned.
Write Operation: Host to device Data Transfer
Figure 5: SPI Write Transaction