User's Manual

SSD50NBT
Hardware Integration Guide
Embedded Wireless Solutions Support Center:
http://ews-support.lairdtech.com
www.lairdtech.com/bluetooth
24
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PIN DEFINITIONS
Pin #
Name
Type
Voltage
Reference
Description
If Not
Used
1
GND
-
-
Ground
GND
2
GND
-
-
Ground
GND
3
WIFI_RFKILL
(GPIO-10)
I, PU
SDIO_IOVDD
Reserved for RF disable (RF Kill) feature.
Active Low.
Note: The current does not support it.
# See Boot strap configuration.
N/C
4
XPABIAS51
O
VDDIO
Control signal for external 5GHz power
amplifier Chain 1.
N/C
5
GND
-
-
Ground
GND
6
VDD33_FEM
Power
-
3.3V Power for FEM
3.3V
7
VDD33_FEM
Power
-
3.3V Power for FEM
3.3V
8
GND
-
-
Ground
GND
9
GND
-
-
Ground
GND
10
GND
-
-
Ground
GND
11
ANT_1 (Wi-Fi)
A_IO
-
WLAN antenna port
(Chain 1)
50 Ωload
12
GND
-
-
Ground
GND
13
XPABIAS20
O
VDDIO
Control signal for external 2GHz power
amplifier Chain 0.
N/C
14
BT_PCM_SYNC
I/O,
PD
VDDIO
PCM interface synchronization control,
input for slave, output for master, weak
internal pull-down. High on reset, low
after reset.
N/C
15
BT_PCM_BCLK
I/O,
PD
VDDIO
PCM interface bit clock, input for slave,
output for master, weak internal pull-
down. High on reset, low after reset.
N/C
16
BT_PCM_IN
I, PD
VDDIO
PCM synchronous input, weak internal
pull-down.
N/C
17
BT_PCM_OUT
O, PD
VDDIO
PCM synchronous output, weak internal
pull-down.
N/C
18
XPABIAS50
O
VDDIO
Control signal for external 5GHz power
amplifier Chain 1.
N/C
19
GND
-
-
Ground
GND
20
ANT_0
(Wi-Fi and BT)
A_IO
-
WLAN/BT antenna port
(Chain 0)
50 Ωload
21
GND
-
-
Ground
GND
22
BT_PWD_L
I, PD
VDDIO
BT chip power-down control. Driving this
pin active low to power down or to reset
the BT chip. Has internal strong pull-
down.
Note: Should be low for at least 5 ms for
chip reset.
10K PU