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User Guide

SSD50NBT

Version 1.0

Summary of content (41 pages)

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A User Guide SSD50NBT Version 1.
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SSD50NBT Hardware Integration Guide REVISION HISTORY Version 1.0 Date 22 Feb 2016 Notes Preliminary Release Embedded Wireless Solutions Support Center: http://ews-support.lairdtech.com www.lairdtech.com/bluetooth Approver Connie Lin 2 © Copyright 2015 Laird.
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SSD50NBT Hardware Integration Guide CONTENTS Scope ..........................................................................................................................................................................4 SSD50NBT Features Summary ....................................................................................................................................4 Specifications .................................................................................................................
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SSD50NBT Hardware Integration Guide Scope This document describes key hardware aspects of the Laird SSD50NBT system in package (SIP) modules providing either SDIO or USB bus interface for WLAN connection and UART/PCM for Bluetooth connection. This document is intended to assist device manufacturers and related parties with the integration of this radio into their host devices.
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SSD50NBT Hardware Integration Guide Feature Advanced WLAN Host Offloading (WLAN) Description Includes the following advanced WLAN features:  IEEE 802.11e QoS, Wi-Fi Alliance  Self-managed power state handling WMM Power Save, and 802.
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SSD50NBT Hardware Integration Guide Feature Description 802.11g (with BT in standby) @ 18 dBm 6 Mbps Transmit: 450 mA Receive: 250 mA Standby: 130 mA 802.11n (2.4 GHz) (with BT in standby) @ 14 dBm MCS7 Transmit: 340 mA Receive: 250mA Standby: 130 mA 802.11n (5 GHz) (with BT in standby) @ 14 dBm MCS7 Transmit: 490 mA Receive: 260 mA Standby: 130 mA 802.11g (with BT in standby) @ 18 dBm 6 Mbps Transmit: 710 mA Receive: 140 mA Standby: 130 mA 802.11n (2.
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SSD50NBT Hardware Integration Guide Feature Wi-Fi Data Rates Supported Description 11a (OFDM) 6, 9, 12, 18, 24, 36, 48, 54 Mbps 802.11b (DSSS, CCK) 1, 2, 5.5, 11 Mbps 802.11g (OFDM) 6, 9, 12, 18, 24, 36, 48, 54 Mbps 802.11n (OFDM, MCS 0-15) Full Guard Interval: 6.5,13.0, 19.5, 26.0,39.0,52.0,58.5,65.0, 13.0,26.0,39.0, 52.0, 78.0,104.0,117.0 Mbps Short Guard Interval: 1.2,14.4,21.7,29.9,43.3,57.8,65.0,72.2, 14.4,28.9,43.3,57.8, 86.7,115.6,130.0,144.4 Mbps Modulation BPSK @ 1, 6,9, 6.5, 7.2,13 and 14.
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SSD50NBT Hardware Integration Guide Feature 5 GHz Frequency Bands Description ETSI 5.15 GHz to 5.35 GHz (Ch 36/40/44/48/52/56/60/64) 5.47 GHz to 5.725 GHz (Ch 100/104/108/112/116/120/124/128/132/136/140) FCC 5.15 GHz to 5.35 GHz (Ch 36/40/44/48/52/56/60/64) 5.47 GHz to 5.725 GHz (Ch 100/104/108/112/116/120/124/128/132/136/140 5.725 GHz to 5.825 GHz(Ch 149/153/157/161/165) MIC (Japan) 5.15 GHz to 5.35 GHz (Ch 36/40/44/48/52/56/60/64) 5.47 GHz to 5.
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SSD50NBT Hardware Integration Guide Feature Typical Receiver Sensitivity Note: All values nominal, +/-3 dBm. Description 802.11a: 6 Mbps -93 dBm 54 Mbps 802.11b: 1 Mbps -75 dBm (PER <= 10%) 11 Mbps 802.11g: 6 Mbps -88 dBm (PER <= 10%) -95 dBm -92 dBm 54 Mbps -75 dBm (PER <= 10%) 802.11n (2.4 GHz) MCS0 Mbps -92 dBm MCS7 Mbps -72 dBm 802.
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SSD50NBT Hardware Integration Guide Feature Compliance Certifications Warranty Description ETSI Regulatory Domain EN 300 328 (Wi-Fi®) EN 300 328 v1.8.1 (BT 2.1) EN 301 489-1 EN 301 489-17 EN 301 893 EN 60950-1 EU 2002/95/EC (RoHS) FCC Regulatory Domain FCC 15.247 DTS – 802.11b/g (Wi-Fi) – 2.4 GHz FCC 15.407 UNII – 802.11a (Wi-Fi) – 5 GHz FCC 15.247 DSS – BT 2.1 Industry Canada RSS-247 – 802.11a/b/g/n (Wi-Fi) – 2.4 GHz, 5.8 GHz, 5.2 GHz, and 5.4 GHz RSS-247 – BT 2.1 Wi-Fi Alliance 802.11a, 802.11b, 802.
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SSD50NBT Hardware Integration Guide Feature Reset Control Description WLAN_PWD_L and BT_PWD_L pins must be asserted low to reset Wi-Fi and Bluetooth. After these signals are de-asserted, the radio waits for host communication. Until then, all modules except the host interface are held in reset. Once the host has initiated communication, the radio turns on its crystal and then the PLL. After all clocks are stable and running, the block resets are automatically de-asserted.
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SSD50NBT Hardware Integration Guide Feature Hardware Power States Description The SSD50NBT hardware has five top level hardware power states managed by the RTC block. State Sleep State Management Description  CHIP_PWD_L pin assertion immediately brings the chip to the OFF state.  Sleep clock is disabled. OFF  No state is preserved.  WLAN is turned off. The Bluetooth clock is off but should also be powered down through BT_PWD_L.  Only the host interface is powered on.
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SSD50NBT Hardware Integration Guide Feature Description The SSD50NBT has an RTC block which controls the clocks and power going to other internal modules. Its inputs consist of sleep requests from these modules and its outputs consists of clock enable and power signals which are used to gate the clocks going to these modules. The RTC block also manages resets going to other modules with the device. The SSD50NBT’s clocking is grouped into two types: high-speed and low-speed.
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SSD50NBT Hardware Integration Guide BLUETOOTH FUNCTIONAL DESCRIPTION The SSD50NBT Bluetooth (BT) block is based on CSR8811A08 and described in the table below: Table 3: Bluetooth functions Feature HCI-UART Interface PCM or I2S Interface CPU and Memory Description The UART Interface is a standard high-speed UART interface. It operates up to 4 Mbps, supporting Bluetooth HCI UART interface.  Continuous PCM encoded audio data transmission and reception over Bluetooth.
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SSD50NBT Hardware Integration Guide Feature Description Radio The BT radio shares the single antenna port with the WLAN through an internal 3-way RF switch. The SSD50NBT implements WLAN/BT coexistence internally. VDDIO is to set the I/O voltage internally with either 1.8 V or 3.3 V to ensure same voltage level for the internal Wi-Fi and BT coexistence signal. Refer to the reference design specifications for details. BT wake up Host PIO-3 is reserved for BT to wake host from deep sleep mode.
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SSD50NBT Hardware Integration Guide DC Electrical Characteristics Table 6 and Table 7 list the general DC electrical characteristics over recommended operating conditions (unless otherwise specified). Table 6: General DC Electrical Characteristics (For 3.
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SSD50NBT Hardware Integration Guide Figure 2: Power On/Off Timing Figure 3: Wi-Fi and BT reset Timing Embedded Wireless Solutions Support Center: http://ews-support.lairdtech.com www.lairdtech.com/bluetooth 17 © Copyright 2015 Laird.
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SSD50NBT Hardware Integration Guide Table 8: Timing Diagram Definitions Timing Ta Tb Description Time between 3.3V (VDD33/BT_VDD/VDD_FEM/VDD_USB) and VDDIO/SDIO_IOVDD supplies Min Unit 0 µsec Time between VDDIO/SDIO_IOVDD supplies valid and WLAN_PWD_L negation. 5 µsec Note: there are 10K ohm internal Pull-up on SD_D0, SD_D1 and SD_D3.
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SSD50NBT Hardware Integration Guide Symbol Parameter OFDM, 54 Mbps HT20, MCS0 Conditions Min Typ 16 31 HT20, MCS7 Max Unit 14 3 Performance data are measured under signal chain operation. 4 Performance data are measured under signal chain operation.
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SSD50NBT Hardware Integration Guide 18dBm 15dBm Typical Current Consumption Single Chain (mA)8 420 350 Max. Current Consumption Single Chain (mA)8 560 450 HT20 MCS7 1 Mbps 14dBm 18dBm 340 420 420 560 54 Mbps HT20 MCS7 15dBm 14dBm 350 340 450 420 1 Mbps 54 Mbps 18dBm 15dBm 420 350 560 450 HT20 MCS7 14dBm 340 420 Freq.
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SSD50NBT Hardware Integration Guide Note: 2.4GHz does not support HT40 operation, only 5GHz support HT40 operation. BLUETOOTH RADIO CHARACTERISTICS Table 13 through Table 14 describe the basic rate transmitter performance, enhanced data transmitter performance, basic rate receiver performance, enhanced rate receiver performance, and current consumption conditions at 25°C. Table 13: Basic Rate Transmitter Performance Temperature at 25°C (3.
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SSD50NBT Hardware Integration Guide Test Parameter Min Typ Max BT Spec. Unit π/4 DQPSK — 12 — ≤ 30 % 8 DPSK — — ≤ 20 % — — — — ≥ 99 < –40 ≤ –20 ≤ –26 % dBm dBm dB 99% DEVM EDR Differential Phase Encoding F≥ ± 3MHz Adjacent Channel Power F = ± 2MHz F = ±1MHz 12 — — — — 99 –60 –28 –32 Table 15: Basic Rate Receiver Performance at 3.3V Test Parameter Min Typ Max BT Spec. Unit Sensitivity BER ≤ 0.1% — –84 -78 ≤ –70 dBm Maximum Input BER ≤ 0.
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SSD50NBT Hardware Integration Guide Figure 4: SDIO Default Mode Timing Note: Timing is based on CL ≤ 40 pF load on CMD and Data. Table 17: SDIO Timing Requirements Symbol fPP tWL tWH tTLH tTHL tISU tIH tODLY Parameter Frequency – Data Transfer mode Clock low time Min. 0 7 Typ. - Max.
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SSD50NBT Hardware Integration Guide PIN DEFINITIONS Pin # Name Type 1 2 GND GND - Voltage Reference - 3 WIFI_RFKILL (GPIO-10) I, PU SDIO_IOVDD 4 XPABIAS51 O VDDIO 5 6 7 8 9 10 GND VDD33_FEM VDD33_FEM GND GND GND Power Power - - 11 ANT_1 (Wi-Fi) A_IO - 12 GND - - 13 XPABIAS20 O VDDIO 14 BT_PCM_SYNC I/O, PD VDDIO 15 BT_PCM_BCLK I/O, PD VDDIO 16 BT_PCM_IN I, PD VDDIO 17 BT_PCM_OUT O, PD VDDIO 18 XPABIAS50 O VDDIO 19 - - A_IO - 21 GND ANT_0 (Wi-Fi and BT
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SSD50NBT Hardware Integration Guide Name Type 23 NC - Voltage Reference - 24 CLK_32K I VDDIO 25 26 27 28 BT_VDD GND BT_UART_RXD BT_UART_TXD Power I, PU O, PU VDDIO VDDIO 29 BT_UART_CTS I, PU VDDIO 30 BT_UART_RTS O, PU VDDIO 31 BT_WAKEUP_HOST O VDDIO 32 GND - - Pin # VDDIO Power - 34 35 36 37 38 GND SDIO_CLK GND SDIO_DATA_0 SDIO_DATA_1 I I/O I/O VDDIO SDIO_IOVDD SDIO_IOVDD 39 SDIO_DATA_2 I/O SDIO_IOVDD 40 SDIO_DATA_3 I/O SDIO_IOVDD 41 SD_CMD I/O SDIO_IOVDD 42
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SSD50NBT Hardware Integration Guide Pin # Name Type Voltage Reference 45 VDD12_USB Power - 46 VDD33_USB Power - 47 VDD12_PMU Power output - 48 USB_D+ I/O - I/O - 49 USB_D- 50 GND - - 51 WLAN_PWD_L I, PD SDIO_IOVDD 52 WLAN_TDO - SDIO_IOVDD 53 AR6004_GPIO38 I/O VDDIO 54 55 56 57 58 59 LTE_COEX3 LTE_ACTIVE LTE_FRAME_SYNC VDD33 VDD33 GND Power Power - VDDIO VDDIO VDDIO - 60 WAKE_ON_WLAN O, PD SDIO_IOVDD 61 DEBUG_UART_TXD O SDIO_IOVDD 62 63 WCN_PRIORITY GND -
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SSD50NBT Hardware Integration Guide Name Type Voltage Reference 64 XPABIAS21 O VDDIO 6580 GND - - Pin # If Not Used Description Control signal for external 2GHz power amplifier Chain 1.
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SSD50NBT Hardware Integration Guide Figure 5: Setting when using USB interface Figure 6: Setting when using SDIO interface MECHANICAL SPECIFICATIONS Module dimensions of SSD50NBT are 15 x 15 x 2.5 mm. Detail drawings are shown in Figure 7. Figure 7: Module dimension of SSD50NBT Note: The Wi-Fi MAC address is located on the product label. The BT MAC address is always be numerically subsequent to the Wi-Fi MAC address. Therefore, the BT MAC address is Wi-Fi MAC address plus one.
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SSD50NBT Hardware Integration Guide TOP VIEW Figure 8: Pad dimensions and pin numbers Recommend minimal via size and placement for grounding and thermal dissipation. Please double the ground via number when using laser via on HID process. More ground via and using 1-oz copper is recommended in our design to get better thermal dissipation. Note: When soldering, the stencil thickness should be ≥ 0.1 mm.
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SSD50NBT Hardware Integration Guide        If there are other radios or transmitters located on the device (such as a Bluetooth radio), place the devices as far apart from each other as possible. Also, make sure there are at least 25 dB isolation between Bluetooth antenna and Wi-Fi antenna. Ensure that there is the maximum allowable spacing separating the antenna connectors on the Laird radio from the antenna. In addition, do not place antennas directly above or directly below the radio.
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SSD50NBT Hardware Integration Guide Temporary Storage Requirements after Opening The following are temporary storage requirements after opening:   Only re-store the devices once prior to soldering. Use a dry box or place desiccant (with a blue humidity indicator) with the devices and perform dry packing again using heat-sealing.
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SSD50NBT Hardware Integration Guide Figure 9: Temperature Profile Cautions When Removing the SIP from the Platform for RMA   Bake the platform before remove the SIP from the platform. Reference baking conditions. Remove the SIP by using a hot air gun. This process should be carried out by a skilled technician. Suggestion conditions:  One-side component platform: – Set the hot plate at 280°C. – Put the platform on the hot plate for 8~10 seconds. – Remove the SIP from platform.
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SSD50NBT Hardware Integration Guide Two-side components platform: – Use two hot air guns – On the bottom side, use a pre-heated nozzle (temperature setting of 200~250°C) at a suitable distance from the platform PCB. – On the top side, apply a remove nozzle (temperature setting of 330°C). Heat the SIP until it can be removed from platform PCB. Remove Nozzle Platform PCB SIP Pre-heat Nozzle Remove the residue solder under the bottom side of SIP.
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SSD50NBT Hardware Integration Guide Precautions for Use   Opening/handing/removing must be done on an anti-ESD treated workbench. All workers must also have undergone anti-ESD treatment. The devices should be mounted within one year of the date of delivery. REGULATORY Certified Antennas Model 2400~2483.5MHz 5150~5250MHz 5250~5350MHz 5470~5725MHz 5725~5850MHz 2.1 dBi (2.4-2.5 GHz), 2.4 dBi (4.9 GHz) 2.6 dBi (5.25 GHz), 3.4 dBi (5.
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SSD50NBT Hardware Integration Guide Peak gain ( dBi ) Model Type Connector Ethertronics WLAN_1000146 Isolated Magnetic Dipole IPEX MHF 2400~2483.5 5150~5250 MHz MHz 5250~5350 5470~5725 5725~5850 MHz MHz MHz 2.5dBi 3.5 dBi FCC Federal Communication Commission Interference Statement This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules.
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SSD50NBT Hardware Integration Guide As long as the three conditions above are met, further transmitter testing will not be required. However, the OEM integrator is still responsible for testing their end-product for any additional compliance requirements required with this module installed.
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SSD50NBT Hardware Integration Guide Antenna Information Peak gain ( dBi ) Model Type Connector Dipole RP-SMA Laird NanoBlade-IP04 PCB Dipole IPEX MHF 2 dBi Laird MAF95310 Mini NanoBlade Flex PCB Dipole IPEX MHF 2.79 dBi 3.38 dBi Laird NanoBlue-IP04 PCB Dipole IPEX MHF 2dBi _ Ethertronics WLAN_1000146 Isolated Magnetic Dipole IPEX MHF 2.5dBi 3.5 dBi Laird MAF94051 2400~2483.5 5150~5250 MHz MHz 2.1 dBi 5250~5350 5470~5725 5725~5850 MHz MHz MHz 2.4 dBi 2.6 dBi 3.4 dBi 3.
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SSD50NBT Hardware Integration Guide Déclaration d'exposition aux radiations Cet équipement est conforme Canada limites d'exposition aux radiations dans un environnement non contrôlé. Cet équipement doit être installé et utilisé à distance minimum de 20cm entre le radiateur et votre corps. This device is intended only for OEM integrators under the following condition:  The transmitter module may not be co-located with any other transmitter or antenna.
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SSD50NBT Hardware Integration Guide Le manuel de l'utilisateur final doit inclure toutes les informations réglementaires requises et avertissements comme indiqué dans ce manuel. EUROPEAN UNION REGULATORY The SSD50NBT has been tested for compliance with relevant standards for the EU market. SSD50NBT module was tested with antennas listed below. Model 2400~2483.5MHz 5150~5250MHz 5250~5350MHz 5470~5725MHz 5725~5850MHz 2.1 dBi (2.4-2.5 GHz), 2.4 dBi (4.9 GHz) 2.6 dBi (5.25 GHz), 3.4 dBi (5.
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SSD50NBT Hardware Integration Guide Article Number 3.2 Requirement Means of the efficient use of the radio frequency spectrum Reference standard(s) EN 300 328 V1.8.1 (2012-06) EN 301 893 v1.8.1 ORDERING INFORMATION Part Number SSD50NBT Description 2X2 802.11 a/b/g/n with BT4.0 dual mode module. General Comments This is a preliminary datasheet. Please check with Laird for the latest information before commencing a design. If in doubt, ask.
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SSD50NBT Hardware Integration Guide Magyar [Hungarian] Alulírott, [gyártó neve] nyilatkozom, hogy a [... típus]megfelel a vonatkozó alapvetõ követelményeknek és az 1999/5/EC irányelv egyéb elõírásainak. Polski [Polish] Niniejszym [nazwa producenta] oświadcza, że [nazwa wyrobu] jest zgodny z zasadniczymi wymogami oraz pozostałymi stosownymi postanowieniami Dyrektywy 1999/5/EC.