User's Manual

SiFLEX01 TRANSCEIVER MODULE
DATASHEET
The information in this document is subject to change without notice.
330-0026-R0.4 Copyright © 2010-2012 LS Research, LLC Page 10 of 23
Microcontroller
The CC430 contains an MSP430 16 bit RISC core with 16 registers. The radio registers allow access
to radio functions without the bottleneck of an intermediate interface.
There are 5 modes of operation including Active Mode and 4 low power modes with progressively lower
power achieved through disabling peripherals and clocks.
RAM is organized into 2k sectors which can be powered down to save current when not in use. Data is
not retained during power-down.
A DMA controller is included to allow direct memory to memory transfers without CPU intervention.
DMA can remain active in some sleep modes for increased power savings.
A hardware AES encryption engine is included to allow 128 bit Advanced Encryption Standard (AES)
(FIPS PUB 197) to be implemented without excessive firmware burden.
Figure 4 shows a block diagram of the CC430.
Figure 4 CC430F613x Block Diagram