User's Manual
Table Of Contents
- FEATURES
- APPLICATIONS
- DESCRIPTION
- ORDERING INFORMATION
- MODULE ACCESSORIES
- BLOCK DIAGRAM
- DEVELOPMENT KIT
- MODULE PINOUT AND PIN DESCRIPTIONS
- MODULE OVERVIEW
- OPERATING MODES TRUTH TABLE
- MODES OF OPERATION
- DEVELOPMENT TOOLS
- ELECTRICAL SPECIFICATIONS
- SOLDERING RECOMMENDATIONS
- CLEANING
- OPTICAL INSPECTION
- REWORK
- SHIPPING, HANDLING, AND STORAGE
- AGENCY STATEMENTS
- MECHANICAL DATA
- COMPATIBILITY
- MODULE REVISION HISTORY
- CONTACTING LS RESEARCH
SiFLEX02-HP TRANSCEIVER MODULE
DATASHEET
The information in this document is subject to change without notice.
Confirm the data is current by downloading the latest revision from www.lsr.com.
330-0047-R0.7 Copyright © 2010-2011 LS Research, LLC Page 6 of 35
MODULE PINOUT AND PIN DESCRIPTIONS
MCU#
GND
1
SiFLEX02-HP
(Atmel ATXMEGA256A3)
69
GND
MCU#
-
GND
2 68
GND
-
-
GND
3 67
GND
-
-
NC
4 66
NC
-
-
NC
5 65
NC
-
-
VPA
6 64
NC
-
-
VPA
7 63
NC
-
-
NC
8 62
NC
-
10
JTAG TMS
9 61
PC5
21
11
JTAG TDI
10 60
PC6
22
12
JTAG TCK
11 59
PC7
23
13
JTAG TDO
12 58
PC4
20
56 JTAG/PDI/JRST 13 57
PE0
36
57
nRESET
14 56
PE1
37
62
PA0
15 55
NC
-
-
NC
16 54
NC
-
64
PA2
17 53
NC
-
63
PA1
18 52
NC
-
5
PA7
19 51
NC
-
2
PA4
20 50
NC
-
3
PA5
21 49
NC
-
4
PA6
22 48
NC
-
7
PB1
23 47
NC
-
8
PB2
24 46
NC
-
9
PB3
25 45
NC
-
-
VCC - 3V3DC
26 44
GND
-
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
PF3
PF2
PF1
PF0
PE5
PE4
PE3
PE2
PC3/UART
TX
PC2/UART
RX
PC1
PC0
PF5
PF6
PF7
PA3
NC
MCU#
49 48 47 46 41 40 39 38 19 18 17 16 51 54 55 1 -
MCU#
Figure 3 Module Pinout