User's Manual

SiFLEX02 TRANSCEIVER MODULE
MODULE USER’S GUIDE
3 Module Application Circuits
3.1 CAD Symbols
PADS CAD symbols for schematic and PCB can be downloaded from the LSR website
www.lsr.com
.
3.2 Recommended Application Connections - JTAG
Figure 1 shows the minimum circuit connections required for the SiFLEX module, if
programming/debugging via AVR JTAGICE mkII. The LEDs and USER buttons are
needed for Ping Pong Range Test, otherwise they are optional. The LED’s during
normal operation flash to indicate module status (UART activity, RF activity, and
heartbeat). Note at the time of this writing the User2 button is not used.
The reset (nRESET) pin (14) is active low. On the SiFLEX module it is pulled high with a
14kΩ resistor. To reset the module, pull the pin low to ground for at least 100µS. This is
necessary to ensure a proper reset of the module.
(Optional LEDs)
(Optional buttons)
26 VCC UART TX 35
UART RX 36
PF3 27
11 TCK
12 TDO PF2 28
9TMS
10 TDI PF1 29
13 JTAG/PDI/JRST
14 nRESET PE5 31
44 GND PF0 30
JTAG Header
2 1
4 3
6 5
8 7
10 9
SiFLEX Module
3M
N2510-6002-UB
TX
RX
Module Reset
VCC
GND
USER1
Host
470 Ω
10 kΩ
47 nF
470 Ω
470 Ω
USER2
47 nF
10 kΩ
Green
Red
Yellow
RESET
1 kΩ
(Optional
button)
1 kΩ
Figure 1 Sample Application Circuit with JTAG
The information in this document is subject to change without notice.
Confirm the data is current by downloading the latest revision from www.lsr.com.
SFLX-UG-0002-01.12 Copyright © 2009 LS Research, LLC Page 5 of 22