User's Manual

BT85x Series
Datasheet
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Figure 5 and Table 12 shows PCM Timing Diagram and Specifications for the slave mode of long-frame.
Figure 5: PCM timing diagram (Long-Frame Sync, Slave Mode)
Table 12: PCM Interface timing specifications (Long-Frame Sync, Slave Mode)
Ref No. Characteristics Minimum Typical Maximum Unit
1 PCM bit clock frequency - - 12 MHz
2 PCM bit clock LOW 41 - - ns
3 PCM bit clock HIGH 41 - - ns
4 PCM_SYNC setup 8 - - ns
5 PCM_SYNC_hold 8 - - ns
6 PCM_OUT delay 0 - 25 ns
7 PCM_IN setup 8 - - ns
8 PCM_IN hold 8 - - ns
9
Delay from rising edge of PCM_BCLK during last bit
period to PCM_OUT becoming high impedance
0 - 25 ns
8.3.3. Data Formatting
The BT85-Sx0 may be configured to generate and accept several different data formats. For conventional
narrowband speech mode, the BT850 uses 13 of the 16 bits in each PCM frame. The location and order of these
13 bits can be configured to support various data formats on the PCM interface. The remaining three bits are
ignored on the input and may be filled with 0s, 1s, a sign bit, or a programmed value on the output. The default
format is 13-bit 2’s complement data, left justified, and clocked MSB first.
8.3.4. Wideband Speech Support
When the host encodes Wideband Speech (WBS) packets in transparent mode, the encoded packets are
transferred over the PCM bus for an eSCO voice connection. In this mode, the PCM bus is typically configured in
master mode for a 4-kHz sync rate with 16-bit samples, resulting in a 64 Kbps bit rate. The BT850-Sx also
supports slave transparent mode using a proprietary rate-matching scheme. In SBC-code mode, linear 16-bit
data at 16 kHz (256 Kbps rate) is transferred over the PCM bus.