User's Manual
Table Of Contents
- Revision History
- Contents
- 1 Scope
- 2 Operational Description
- 3 Block Diagram and Descriptions
- 4 Specifications
- 5 Pin Definitions
- 6 DC Electrical Characteristic
- 7 RF Characteristics
- 8 Interface
- 9 Power Supply and Regulation
- 10 Antenna Performance
- 11 Mechanical Dimensions and Land Pattern
- 12 Implementation Note
- 13 Application Note for Surface Mount Modules
- 14 FCC and IC Regulatory
- 15 European Union Regulatory
- 16 Ordering Information
- 17 Bluetooth SIG Approvals
BT830 Hardware Integration Guide
Version 0.1 (PRELIMINARY)
Americas: +1-800-492-2320 Option 2
Europe: +44-1628-858-940
Hong Kong: +852-2923-0610
www.lairdtech.com/bluetooth
16
CONN-GUIDE-BT830
(PRELIMINARY)
Figure 8: 16-bit Slot Length and Sample Formats
8.7
PCM Timing Information
Table 10: PCM Timing information
Symbol
Parameter
Min
Typ
Max
Unit
f
mclk
PCM_CLK frequency
4MHz DDS generation. Frequency
selection is programmable.
-
128
-
kHz
256
512
48MHz DDS generation. Frequency
selection is programmable.
2.9
-
-
kHz
-
PCM_SYNC frequency for SCO connection
-
8
-
kHz
t
mclkh
(a)
PCM_CLK high
4MHz DDS generation
980
-
-
ns
t
mclkl
a)
PCM_CLK low
4MHz DDS generation
730
-
-
ns
-
PCM_CLK jitter
48MHz DDS generation
-
-
21
ns
pk-pk
t
dmclksynch
Delay time from
PCM_CLK high to
PCM_SYNC high
4MHz DDS generation
-
-
20
ns
48MHz DDS generation
-
-
40.83
ns
t
dmclkpout
Delay time from PCM_CLK high to valid PCM_OUT
-
-
20
ns
t
dmclklsyncl
Delay time from
PCM_CLK low to
4MHz DDS generation
-
-
20
ns
48MHz DDS generation
-
-
40.83
ns