User's Manual
Table Of Contents
- 1 Overview and Key Features
- 2 Specification
- 2.1 Specification Summary
- 3 Hardware Specifications
- 3.3.4 OTA (Over-the-Air) smartBASIC Application Download
- 4 Power Consumption
- 5 Functional Description
- 5.1 Power Management (includes Brown-out and Power on Reset)
- 5.2 Clocks and Timers
- 5.3 Memory for smartBASIC Application Code
- 5.4 Radio Frequency (RF)
- 5.5 NFC
- 5.6 UART Interface
- 5.7 SPI Bus
- 5.8 I2C Interface
- 5.9 General Purpose I/O, ADC, PWM and FREQ
- 5.10 nRESET pin
- 5.11 nAutoRUN pin
- 5.12 vSP Command Mode
- 5.13 Two-wire Interface JTAG
- 5.14 BL652 Wakeup
- 5.15 Low Power Modes
- 5.16 Temperature Sensor
- 5.17 Random Number Generator
- 5.18 AES Encryption/Decryption
- 5.19 Optional External Serial (SPI) Flash
- 5.20 Optional External 32.768 kHz crystal
- 5.21 BL652-SA On-board Chip Antenna Characteristics
- 6 Hardware Integration Suggestions
- 7 Mechanical Details
- 8 Application Note for Surface Mount Modules
- 9 FCC and IC Regulatory Statements
- 10 Japan (MIC) Regulatory
- 11 CE Regulatory
- 12 EU Declarations of Conformity
- 13 Ordering Information
- 14 Bluetooth SIG Qualification
BL652
Datasheet
Embedded Wireless Solutions Support Center:
http://ews-support.lairdtech.com
www.lairdtech.com/bluetooth
36
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Americas: +1-800-492-2320
Europe: +44-1628-858-940
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– Date rate 106 kbps
– NFC-A tag (can only be a target/tag; cannot be an initiator)
Modes of Operation:
– Disable
– Sense
– Activated
5.5.1 Use Cases
Touch-to Pair with NFC
Launch a smartphone app (on Android)
NFC enabled Out-of-Band Pairing
System Wake-On-Field function
– Proximity Detection
UART Interface
The Universal Asynchronous Receiver/Transmitter offers fast, full-duplex, asynchronous serial communication
with built-in flow control support (UART_CTS, UART_RTS) in HW up to one Mbps baud. Parity checking and
generation for the ninth data bit are supported.
UART_TX, UART_RX, UART_RTS, and UART_CTS form a conventional asynchronous serial data port with
handshaking. The interface is designed to operate correctly when connected to other UART devices such as the
16550A. The signaling levels are nominal 0 V and 3.3 V (tracks VCC) and are inverted with respect to the signaling
on an RS232 cable.
Two-way hardware flow control is implemented by UART_RTS and UART_CTS. UART_RTS is an output and
UART_CTS is an input. Both are active low.
These signals operate according to normal industry convention. UART_RX, UART_TX, UART_CTS, UART_RTS are
all 3.3 V level logic (tracks VCC). For example, when RX and TX are idle they sit at 3.3 V. Conversely for
handshaking pins CTS, RTS at 0 V is treated as an assertion.
The module communicates with the customer application using the following signals:
Port/TxD of the application sends data to the module’s UART_RX signal line
Port/RxD of the application receives data from the module’s UART_TX signal line
Figure 6: UART signals
Note: The BL652 serial module output is at 3.3V CMOS logic levels (tracks VCC). Level conversion must be
added to interface with an RS-232 level compliant interface.
BL652