User's Manual

60-2230C
Datasheet
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10.2 SDR104 Mode (208MHz) (1.8V)
Figure 3: SDIO protocol timing Diagram--- SDR104 modes (up to 208 MHz) (1.8V)
Table 17: SDIO timing requirements--- SDR104 modes (up to 208MHz) (1.8V)
Note: Over full range of values specified in the Recommended Operating Conditions unless otherwise
specified.
Symbol Parameter Condition Min. Typ. Max. Unit
f PP Clock Frequency SDR104 0 - 208 MHz
T ISU Input setup time SDR104 1.4 -- - ns
T IH Input Hold time SDR104 0.8 - - ns
T CLK Clock Time SDR104 4.8 - - ns
T CR ,T CF
Raise time, Fall time
T CR ,T CF <0.96ns (max) at 208 MHz
C CARD =10 pF
SDR104
- - 0.2*T CLK ns
T OP Card Output phase SDR104 0 - 10 ns
T ODW
Output timing pf variable data
window
SDR12/25/50 2.88 - - ns