Data Sheet
Table Of Contents
- 1 Overview and Key Features
- 1.2 Application Areas
- Features and Benefits
- 2 Specifications
- 3 Hardware Specifications
- 3.1 Block Diagram and Pin-out
- 3.2 Pin Definitions
- 3.3 Electrical Specifications
- 4 Functional Description
- 4.1 Power Management (includes brown-out and power on reset)
- 4.2 Clocks and Timers
- 4.3 RF
- 4.4 UART Interface
- 4.5 SPI Bus
- 4.6 I2C Interface
- 4.7 General Purpose I/O, ADC and PWM/FREQ
- 4.8 nRESET Pin
- 4.9 nAutoRUN Pin
- 4.10 RM1xx VSP Service and Modes
- 4.11 Two-Wire SWD Programming/Debug Interface
- 4.12 RM1xx on-board chip antenna characteristics
- 5 Hardware Integration Suggestions
- 6 Mechanical Details
- 7 Application Note for Surface Mount Modules
- 8 FCC and IC Regulatory Statements
- 9 CE Regulatory
- 10 EU Declarations of Conformity
- 11 Ordering Information
- 12 Bluetooth SIG Qualification
RM1xx LoRa/BLE Modules
Datasheet
https://connectivity.lairdtech.com/wireless-
modules/lorawan-solutions
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4.6 I2C Interface
The I2C interface is an alternate function on SIO pins, configurable by smart BASIC command.
The two-wire interface can interface a bi-directional wired-OR bus with two lines (SCL, SDA) and has master /slave topology.
The interface is capable of clock stretching. Data rates of 100 kbps and 400 kbps are supported.
An I2C interface allows multiple masters and slaves to communicate over a shared wired-OR type bus consisting two lines
which normally sit at VCC. The RM1xx module can only be configured as an I2C master with additional constraint that it be
the only master on the bus. The SCL is the clock line which is always sourced by the master and SDA is a bi-directional data
line which can be driven by any device on the bus.
IMPORTANT: It is essential to remember that pull-up resistors on both SCL and SDA lines are not provided in the
module and MUST be provided external to the module.
Table 18: I2C Interface
Signal Name Pin # I/O Comments
I2C_SDA 10 I/O
This interface is an alternate function on each pin, configurable by smartBASIC.
I2COPEN() in smartBASIC selects I2C function.
I2C_SCL 9 I/O
4.7 General Purpose I/O, ADC and PWM/FREQ
4.7.1 GPIO
All SIO pins are configurable by smartBASIC. They can be accessed individually. Each has the following user configured
features:
Input/output direction
Output drive strength (standard drive 0.5 mA or high drive 5mA)
Internal pull up and pull down resistors (13 K typical) or no pull-up/down
Wake-up from high or low level triggers on all pins
4.7.2 ADC
The ADC is an alternate function on four select SIO pins, configurable by smart BASIC. This enables sampling up to four
external signals via an internal MUX to the 10 bit ADC. The ADC has configurable input pre-scaling and sample resolution.
4.7.2.1 Analog Interface (ADC)
Table 19: Analog interface
Signal Name
Pin No
I/O
Comments
AIN – Analog Input
17
I
This interface is an alternate function on each pin, configurable by
smartBASIC. AIN configuration selected using GpioSetFunc() function.
10 bit resolution. Voltage scaling 1/1, 2/3, 1/3.
AIN – Analog Input 18 I
AIN – Analog Input
19
I
AIN – Analog Input 20 I
4.7.3 PWM and FREQ Signal Output on up to Two SIO Pins
The PWM and FREQ output is an alternate function on SIO pins, configurable by smart BASIC.
The ability to output a PWM (Pulse Width Modulated) signal or FREQ output signal on up to two GPIO (SIO) output pins can
be selected using GpioSetFunc() function.