Data Sheet

LC840PA
Datasheet
https://www.lairdconnect.com
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Signal Levels Notes:
Note 1
For VDD≥1.7V. The firmware supports high drive (3 mA, as well as standard drive).
Note 2
For VDD≥2.7V. The firmware supports high drive (5 mA (since VDD≥2.7V), as well as standard drive).
The GPIO (SIO) high reference voltage always equals the level on the VDD pin.
▪ Normal voltage mode – The GPIO high level equals the voltage supplied to the VDD pin
▪ High voltage mode – The GPIO high level equals the level specified (is configurable to 1.8V, 2.1V, 2.4V,
2.7V, 3.0V, and 3.3V. The default voltage is 1.8V). In High voltage mode, the VDD pin becomes an output
voltage pin. The VDD output voltage and hence the GPIO is configurable from 1.8V to 3.3V with possible
settings of 1.8V, 2.1V, 2.4V, 2.7V, 3.0V, and 3.3V. Refer to Table 15 for additional details.
Table 5: SIO pin alternative function AIN (ADC) specification
Parameter
Min
Typ
Max
Unit
Maximum sample rate
200
kHz
ADC Internal reference voltage
-1.5%
0.6 V
+1.5%
%
ADC pin input
internal selectable scaling
4, 2, 1, 1/2,
1/3, 1/4, 1/5
1/6
scaling
ADC input pin (AIN) voltage maximum without
damaging ADC w.r.t (see Note 1)
VCC Prescaling
0V-VDD 4, 2, 1, ½, 1/3, ¼, 1/5, 1/6
VDD+0.3
V
Configurable Resolution
8-bit mode
10-bit mode
12-bit mode
bits
Configurable (see Note 2)
Acquisition Time, source resistance ≤10kΩ Acquisition
Time, source resistance ≤40kΩ
Acquisition Time, source resistance ≤100kΩ
Acquisition Time, source resistance ≤200kΩ
Acquisition Time, source resistance ≤400kΩ
Acquisition Time, source resistance ≤800kΩ
3
5
10
15
20
40
uS
uS
uS
uS
uS
uS
Conversion Time (see Note 3)
<2
uS
ADC input impedance (during operation) (see Note 3)
Input Resistance
Sample and hold capacitance at maximum gain
>1
2.5
MOhm
pF
Recommended Operating Parameters Notes:
Note 1
Stay within internal 0.6 V reference voltage with given pre-scaling on AIN pin and do not violate ADC maximum
input voltage (for damage) for a given VCC, e.g. If VDD is 3.6V, you can only expose AIN pin to VDD+0.3 V.
Default pre-scaling is 1/6 which configurable via smartBASIC.
Note 2
Firmware allows configurable resolution (8-bit, 10-bit or 12-bit mode) and acquisition time. LC840PA ADC is a
Successive Approximation type ADC (SSADC), as a result no external capacitor is needed for ADC operation.
Configure the acquisition time according to the source resistance that customer has.
The sampling frequency is limited by the sum of sampling time and acquisition time. The maximum sampling time
is 2us. For acquisition time of 3us the total conversion time is therefore 5us, which makes maximum sampling