Specifications
Table Of Contents
- 1 Overview and Key Features
- 2 Specification
- 3 Hardware Specifications
- 4 Power Consumption
- 5 Functional Description
- 5.1 Power Management
- 5.2 BL654 Power Supply Options
- 5.3 Clocks and Timers
- 5.4 Radio Frequency (RF)
- 5.5 NFC
- 5.6 UART Interface
- 5.7 USB interface
- 5.8 SPI Bus
- 5.9 I2C Interface
- 5.10 General Purpose I/O, ADC, PWM and FREQ
- 5.11 nRESET pin
- 5.12 Two-Wire Interface JTAG
- 5.13 BL654 Wakeup
- 5.14 Low Power Modes
- 5.15 Temperature Sensor
- 5.16 Security/Privacy
- 5.17 Optional External 32.768 kHz crystal
- 5.18 451-00001 On-board PCB Antenna Characteristics
- 5.19 451-00003 USB BLE 5.1 Dongle Mechanical Details
- 6 Hardware Integration Suggestions
- 7 Mechanical Details
- 8 Application Note for Surface Mount Modules
- 9 Regulatory
- 10 Ordering Information
- 11 Bluetooth SIG Qualification
- 12 Additional Assistance
https://www.lairdconnect.com/wireless-
modules/bluetooth-modules/bluetooth-5-
modules/bl654-series-bluetooth-module-nfc
31
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The BL654 Firmware hex file consists of four elements:
▪ smartBASIC runtime engine
▪ Nordic Softdevice
▪ Master Bootloader
Laird Connectivity BL654 smartBASIC firmware (FW) image part numbers are referenced as w.x.y.z (ex. v29.x.y.z). The BL654
smartBASIC runtime engine and Softdevice combined image can be upgraded by the customer over the UART interface.
You also have the option to use the two-wire (JTAG) interface, during production, to clone the file system of a Golden
preconfigured BL654 to others using the Flash Cloning process. This is described in the following application note Flash Cloning
for the BL654. In this case the file system is also part of the .hex file.
Signal Name
Pin No
I/O
Comments
SWDIO
1
I/O
Internal pull-up resistor
SWDCLK
3
I
Internal pull-down resistor
The Laird Connectivity development board incorporates an on-board JTAG J-link programmer for this purpose. There is also the
following JTAG connector which allows on-board JTAG J-link programmer signals to be routed off the development board. The
only requirement is that you should use the following JTAG connector on the host PCB.
The JTAG connector MPN is as follows:
Reference
Part
Description and MPN (Manufacturers Part Number)
JP1
FTSH-105
Header, 1.27mm, SMD, 10-way, FTSH-105-01-L-DV Samtech
Note: Reference on the BL654 development board schematic (Figure 7) shows the DVK development schematic wiring
only for the JTAG connector and the BL654 module JTAG pins.
Figure 7: BL654 development board schematic
Note: The BL654 development board allows Laird Connectivity on-board JTAG J-link programmer signals to be routed off
the development board by from connector JP1
JTAG is require because Nordic SDK applications can only be loaded using the JTAG (smartBASIC firmware can be loaded
using JTAG as well as over the UART). We recommend that you use JTAG (2-wire SWD interface) to handle future BL654
module firmware upgrades. You must wire out the JTAG (2-wire SWD interface) on your host design (see Figure 7, where the
following four lines should be wired out – SWDIO, SWDCLK, GND and VCC). smartBASIC firmware upgrades can still be
performed over the BL654 UART interface, but this is slower than using the BL654 JTAG (2-wire SWD interface) – (60 seconds
using UART vs. 10 seconds when using JTAG).
SWO (SIO_32) is a Trace output (called SWO, Serial Wire Output) and is not necessary for programming BL654 over the SWD
interface.
nRESET_BLE is not necessary for programming BL654 over the SWD interface.
Note: Nordic SDK is not supported on the BL654 USB dongle, part #451-00003.
GND
SWDIO_EXT
SWDCLK_EXT
JP1
PIN HEADER,1.27mm 2X5P
1 2
3 4
5 6
7 8
9 10
nRESET_EXT
SWO_EXT
VDD_VSRC_nRF