Data Sheet

Features
We believe our simulation models are the most accurate and the most complete on the market today. A
summary of model capabilities is listed below:
• The entire instruction set and SFR's.
• Supports all port and other I/O pin operations.
• All on-chip peripherals including timers and UART in all modes of operation (see limitations).
• All interrupt modes.
• Internally generated processor clock for performance. Event timing accurate to one clock period.
• Provides internal consistency checks on code (e.g. execution of invalid op-codes, illegal memory accesses,
stack overflow checking, etc.).
• Fully integrated in to the VSM source level debugging system.
• Fully integrated into the Proteus Diagnostic Control System.
Limitations
The following is a listing of known limitations in the current version of the 8051/52:
x The X2, SPI and keyboard interrupt mode of the AT89C51Rx2 Variants are not modelled.
Compilers
Supported Third Party Compilers
Proteus VSM models will fundamentally work with the exact same HEX file as you would program the
physical device with. However, far more debugging information is available when using a compiler to write the
firmware and providing these object files to Proteus in place of the HEX file provides a much richer working
environment.
We recommend you use the free Labcenter VSM Studio IDE. This will greatly simplify the task as it will
automatically configure supported compilers to work with a Proteus VSM simulation.
If you prefer to work inside your own IDE then you will need to set your compiler options manually. After
compiling for debug, all you need to do is specify the debug file from the compiler as the program property of
the microcontroller on the schematic.
VSM Studio supported toolchains
• IAR
• Raisonance
• SDCC
• KEIL
Proteus Design Suite Page 8 Labcenter Electronics Ltd.