Owner manual

VSBC-32 Functional Description
ID 21168, Rev. 04 Page 2 - 17© PEP Modular Computers GmbH
SER3_RXD C9 Yes PA6 Not usable if SI piggyback uses SCC4 4
SER3_RTS B7 Yes PB15 Not usable if SI piggyback uses SCC4 4
SER3_DTR A12 Yes PB9 Not usable if SI piggyback uses SCC4 4
SER3_CTS B16 Yes PC10 Not usable if SI piggyback uses SCC4 4
SER3_CD B8 Yes PC11 Not usable if SI piggyback uses SCC4 4
User-Defined
A5 No PB0
Used on board SPI SEL for EEPROM.
Cannot be used on CXC
2
A6 No PB1
SPI Clk: can be used if an ‘SPI SEL’
other than PB0 is used.
A8 No PB2
SPI TxD: can be used if an ‘SPI SEL’
other than PB0 is used.
A9 No PB3
SPI RxD: can be used if an ‘SPI SEL’
other than PB0 is used.
A10 No PB8 See MC68360 User Manual
B11 No PB10 Used on board SMC2 (Transmit) 1
C1 No PB6 Used on board SMC1 (Transmit) 1
C4 No PB11 Used on board SMC2 (Receive) 1
C10 No PB7 Used on board SMC1 (Receive) 1
Table 2-5: IUC/IUC-32 Porting Information (Sheet 2 of 2)
CXC
Function
Pin
MC68302
HW
Comp.
MC68(EN)
360
Port
Comment
See
Note
Legend:
1 Reserved Pin: On a standard VSBC-32 board, this signals is used for UART ports at BU7 and BU8.
2 Reserved Pin: On a standard VSBC-32 board, this signal is used for SPI to which the EEPROM is already con-
nected. PB0 is chip select of the EEPROM.
3 Reserved Pin: On PA13, a 24 MHz clock signal is routed via jumper J4. This signal is always needed for PEP
standard software (serial drivers).
4 Dual Functioning Pin: This signal is routed both to the mainboard’s interface for serial interface piggybacks
(ST5C) and the CXC backplane connector and can be used by either one or the other, but not both at the same
time. Due to this, a conflict exists if the SCC4 port is to be used with the SI232 piggyback and CXC boards
(such as CXM-SIO3), as both boards access this port. The SCC4 port can, therefore, not be used at the same
time by serial interface piggybacks and CXC boards.