Owner manual

VSBC-32 Introduction
ID 21168, Rev. 04Page 1 - 12 © PEP Modular Computers GmbH
1.4 Technical Specifications
Table 1-2: VSBC-32(E) Technical Specification (Sheet 1 of 3)
VSBC-32(E) Specification
Board Variants
• VSBC-32: MC68360 processor,
• VSBC-32E: MC68EN360 processor
Combined CPU/Serial
Communications Controller
• MC68360: 25 MHz, no Ethernet capability
• MC68EN360: 25MHz or 33 MHz, Ethernet capability
CPU performance: Equivalent to Motorola CPU32
Serial I/O perform.: RISC, 14 dedicated DMA channels
On-Board Memory
• SRAM 256kB or 1MB (dual-ported,
backed-up by means of Gold-Caps)
Note:
1MB with VSBC-32E only.
• EEPROM 2 kbit (serial); 1 kbit available
for applications
• Flash/EPROM 256kB or 1MB DIP EPROM/flash,
16-bit access
Minimum access time - 120ns
Memory on Piggybacks
• DRAM 1, 4, 16 or 32 MB, 32-bit access
• Flash 0, 0.5, 1, 2 or 4 MB, 32-bit access
VMEbus Master/Slave
Functionality
• Master A24:D16/D8, arbitration, AM codes
• Slave A24:D16, dual-port RAM, mailbox IRQ
Interrupt Control
7-level CXC/VME IRQ handler, maskable via CXC/VME inter-
rupt mask register; system vectors:
• ACFAIL* (via VME)Level 7 autovectored
• Abort Level 7 autovectored
• Tick Level 6 autovectored
• Mailbox IRQ Level 5 autovectored, maskable
• SYSFAIL* Level 3 autovectored
16 on-board interrupters; levels/vectors programmable
Programmable Timers
• Tick: Periodic-interrupt timer
• Watchdog: 512ms time-out for reset
• On-board bus error:8µs
• General-purpose: 4*16 bit or 2*32 bit
Special Functions
Real-time clock (backed-up):
• Date (year, month, week, day)
• Time (hour, minute, second)
2kbit serial EEPROM:
• 1kbit for board specific data (serial number, IP address etc.)
• 1kbit for application purposes
DMA: 2 additional independent channels
(transfers between DRAM, FLASH, VME and CXC)