Owner manual

VMP3 Configuration
ID 29230, Rev. 01 © 2005 Kontron Modular Computers GmbH Page 4 - 17
29230.01.UG.VC.050727/091436
P R E L I M I N A R Y
4.3.2 UART B (SER2)
The following table indicate the address mapping of the UART B (SER2). For a more detailed
description please refer to the EXAR XR16C2850 or XR16C2750 DUART manual.
Accessible only when CS A/B is logical 0.
Accessible only when CS A/B is logical 0 and LCR bit 7 is a logical 1.
Accessible only when LCR is set to “BF” hex.
Table 4-22: UART B General Register Set
READ MODE WRITE MODE ADDRESS
Receive Holding Register Transmit Holding Register 0xFFFF 8008
n/a Interrupt Enable Register 0xFFFF 8009
Interrupt Status Register FIFO Control Register 0xFFFF 800A
n/a Line Control Register 0xFFFF 800B
n/a Modem Control Register 0xFFFF 800C
Line Status Register n/a 0xFFFF 800D
Modem Status Register n/a 0xFFFF 800E
Scratchpad Register Scratchpad Register 0xFFFF 800F
Table 4-23: UART B Baud Rate Register Set
READ MODE WRITE MODE ADDRESS
LSB of divisor latch LSB of divisor latch 0xFFFF 8008
MSB of divisor latch MSB of divisor latch 0xFFFF 8009
Table 4-24: UART B Enhanced Register Set
READ MODE WRITE MODE ADDRESS
Trigger Level Register Trigger Level Register 0xFFFF 8008
Feature Control Register Feature Control Register 0xFFFF 8009
Enhanced Feature Register Enhanced Function Register 0xFFFF 800A
Enhanced Mode Select Register Enhanced Mode Select Register 0xFFFF 800F
Xon-1 Xon-1 0xFFFF 800C
Xon-2 Xon-2 0xFFFF 800D
Xoff-1 Xoff-1 0xFFFF 800E
Xoff-2 Xoff-2 0xFFFF 800F