Owner manual

Configuration VMP3
Page 4 - 6 © 2005 Kontron Modular Computers GmbH ID 29230, Rev. 01
29230.01.UG.VC.050727/091435
P R E L I M I N A R Y
4.2.4 Control Register
The Control register provides output interfacing to the application software. Assertion of the ap-
propriate bits by the application software will cause the BPCC to generate outputs accordingly.
During startup, the state of Bit 0 is controlled by the NetBootLoader software. After the startup
is completed, the NetBootLoader sets Bit 0 to 1.
4.2.5 Event Register
The Event register provides status information about the Watchdog timer and various monitor
and control inputs. Depending on the type of event which occurs, interrupts may be generated
automatically which then require servicing. The application software is responsible for servicing
the interrupts as well as the other events, and, where applicable, the resetting of the event bits.
Table 4-5: Control Register
REGISTER NAME CONTROL ACCESS
ADDRESS 0xFFFF A003 R W
BIT POSITION
MSB
7 6 5 4 3 2 1 0
LSB
CONTENT res. res. MC10 S_RST MC9 res. MC11 MC6
DEFAULT n/an/a0n/a0n/a0n/a
BIT CONTENT STATE DESCRIPTION
0MC6
0
Logical high on the MC6 output pin
1
Logical low on the MC6 output pin
1MC11
0
Logical high on the MC11 output pin
1
Logical low on the MC11 output pin
2 reserved
0
1
3MC9
0
Logical low on the MC9 output pin
1
High impedance (Z) on the MC9 output pin
4S_RST
0
no operation
1
Causes a complete system reset (S_RST) to be initiated
5MC10
0
Logical low on the MC10 output pin
1
High impedance (Z) on the MC10 output pin
6 reserved
0
1
7 reserved
0
1