Instruction Manual

VMP1 Configuration

ID 19972, Rev. 0101Page 4 - 12 ® PEP Modular Computers GmbH

4.3.4.7 Watchdog Control Register

4.3.4.8 Watchdog Timeout Time

Bits WDT0 and WDT1 are programmed to select the Watchdog timeout value.

• Bits 2 and 3 are reserved

• Bit WD_TRG retriggers the watchdog timer. A “1” written to this bit sets the watch-

dog back to its start condition.

• Bit 5 is reserved

• Bit WD_R (Watchdog Route). If set to 0 (default), then the watchdog timer causes

a reset, If set to 1, the watchdog timer will generate the NMI

• Bit 7: WD_EN: A “1” written to this bit starts the Watchdog. Once it has been

enabled it cannot later be disabled.

Table 4-12: Watchdog Control Register

Watchdog

control

FFe0 0018 WD_EN WD_R Res. WD_TRG Res. Res. WDT1 WDT0

Table 4-13: Watchdog Timeout Time

WDT1 WDT0 Time

0 0 0,5s

0 1 1s

1 0 1,5s

1 1 2s