Manual

Chapter 6 Software Configuration VM62(A) / VM42(A) User’s Manual

7) Configure CLK lines

• COM2 to full strength

• COM1 disabled

• register access locked 0x83.B -> CLKOCR

8) Configure PEPAR register

• set /IOUT0-2 are PRTY0-2

• select /RAS1DD function

• select /WE0-3

• select AMUX

• select /CAS0-3 0x51C0.W -> PEPAR

9) Configure GMR register

• set refresh counter period to 24

• set refresh cycle length to 3

• set DRAM port size to 32 bit

• assert CS/RAS on CPU space

• enable refresh 0x18800100.L -> GMR

10) Configure autovector register

• enable autovector on levels 2, 3, 5 and 7 0xAC.B -> AVR

11) Configure chip select lines

• CS0: FLASH to 0x4000000, negate timing ‘040 0x4000011.L -> BR0

• CS0: size to 16 MByte, port size 32 bit, tcyc 3 0x3F000000.L -> OR0

• CS1: DRAM to 0x0, burst acknowledge ‘040 0x21.L -> BR1

• CS1: size to 16 MByte, port size 32 bit, tcyc 0, bcyc 1 0xF000001.L -> OR1

• CS2: DMA - VME to 0x87000000 0x87000001.L -> BR2

• CS2: size to 16 MByte, port size external, tcyc 1 0x1F000006.L -> OR2

• CS3: AutoBahn to 0x9000000 0x9000001.L -> BR3

• CS3: size to 16 MByte, port size external, tcyc 1 0x1F000006.L -> OR3

• CS4: SRAM to 0xA000000 0xA000001.L -> BR4

• CS4: size to 16 MByte, port size external, tcyc 1 0x1F000006.L -> OR4

• CS5: CXC to 0xBF70000 0xBF70000.L -> BR5

• CS5: size to 8 kByte, port size external, tcyc 1 0x1FFFE006.L -> OR5

• CS6: RTC to 0xC000000 0xC000001.L -> BR6

• CS6: size to 2 kByte, port size external, tcyc 1 0x1FFFF806.L -> OR6

• CS7: on-board control to 0xD000000 0xD000001.L -> BR7

• CS7: size to 16 MByte, port size external, tcyc 1 0x1F000006.L -> OR7