Owner manual

VM162/VM172Table Of Contents
Juli 23, 1997 Page TOC- 3© PEP Modular Computers
3.3.3 CPU (Bus) Clock .......................................................................................... 3-8
3.3.4 SRAM Size..................................................................................................... 3-8
3.3.5 Communications Clock................................................................................. 3-9
3.3.6 EEPROM Write Protection .......................................................................... 3-9
3.3.7 JTAG Chain .................................................................................................. 3-9
3.3.8 SRAM Data Retention................................................................................. 3-10
3.3.9 BERR1 Timeout .......................................................................................... 3-10
3.3.10 Backup Current Test Bridge..................................................................... 3-10
Chapter
4
Programming....................................................................... 4-1
4.1 VM162/VM172 Address Map........................................................ 4-3
4.2 Initializing the 68EN360............................................................... 4-4
4.3 Initializing the Cache.................................................................... 4-7
Appendices
Memory Piggybacks
SI6 Piggybacks
Bootstrap Loader
Controller eXtension Connector
OS-9 Cabling
Board Layout