Owner manual

ID 31440, Rev. 01 Kontron Modular Computers GmbH

P R E L I M I N A R Y

RevNr. = CP384 - 31440_01 - 060503/144232

Page 4 - 13

ConfigurationCP384

4.4.8 Hardware Debug/Test Registers

These registers are for internal test and debug only. The Common Status Register contains

logic version and PCB version. The Common Debug Register is a read/write register without

any further functionality besides the front panel monitor and control LEDs.

Table 4-13: Output Control Register

BITS TYPE DEFAULT FUNCTION

31-2 r/w 0 Reserved

1 r/w 0 irqen

0 r/w 1 Reset

Note ...

irqen is for enabling of a diagnostic interrupt.

The reset bit should be set to 0 to activate the cluster.

Table 4-14: Output Status Register

BITS TYPE DEFAULT FUNCTION

31 r 0 Fail

30 r 0 Diag

29-0 r 0 Reserved

Note ...

The Diag status flag is the diagnostic bit from the external voltage super-

visor; Fail is the latched Diag status flag.

Table 4-15: Hardware Debug Register

BITS TYPE DEFAULT FUNCTION

31-2 r/w 0 Reserved

1r/w0 FAIL

0r/w0 RUN

Table 4-16: Hardware Status Register

BITS TYPE

DEFAULT

FUNCTION

31-16 r 0 Reserved

15-8 r 00 Reserved

7-0 r 01 Logic Version