Manual

CP383 Configuration

27784.01.VC.040308/162544

P R E L I M I N A R Y

Note ...

The board will continue issuing an interrupt until all interrupt sources are han-

dled completely and no interrupt condition remains.

Table 4-17: General Interrupt Enable Register

BITS TYPE DEFAULT FUNCTION

31 r/w 0 Board Interrupt Enable

30 - 0 r/w 0 Reserved

Note ...

A set bit means that the board’s interrupt is enabled.

Table 4-18: General Interrupt Pending Register

BITS TYPE DEFAULT FUNCTION

31 r/w 0 Board Interrupt Pending

29 - 0 r/w 0 Reserved

Note ...

A set bit means that the board’s interrupt is pending. A board interrupt must be

cleared by writing a "1" to the corresponding output irqen event flag.

Table 4-19: Output Status Register

BITS TYPE DEFAULT FUNCTION

31 r 0 Fail

30 r 0 Diag

29 - 0 r 0 Reserved

Table 4-20: Input IRQ Register

BITS TYPE DEFAULT FUNCTION

31 r/w 0 Not used

30 r/w 0 Input compare interrupt enable

29 - 0 r/w 0 Input event interrupt enable