CP383 27784.01.VC.040308/162541 Manual ID: 27784, Rev. Index 01 8 March, 2004 The product described in this manual is in compliance with all applied CE standards.
Preface CP383 Revision History Publication Title: CP383 16 Channel Digital Input and 16 Channel Digital Output CompactPCI Controller ID Number: 27784 Rev. Index Initial Issue Date of Issue 8 Mar, 2004 Imprint Kontron Modular Computers GmbH may be contacted via the following: MAILING ADDRESS TELEPHONE AND E-MAIL Kontron Modular Computers GmbH Sudetenstraße 7 D - 87600 Kaufbeuren Germany +49 (0) 800-SALESKONTRON sales@kontron.
CP383 Preface Revision History .........................................................................................................ii Imprint ........................................................................................................................ii Copyright ....................................................................................................................ii Table of Contents .............................................................................................
Preface CP383 1.9 Related Publications ......................................................................................1 - 13 Chapter 2. 2 Functional Description .................................................................................2 - 3 2.1 General Information .................................................................................2 - 3 2.2 Board Level Interfacing Diagram .............................................................2 - 3 2.
CP383 Preface 4.2.1 Channels ......................................................................................... 4 - 3 4.2.2 Signal Characteristics ..................................................................... 4 - 3 4.2.3 Channel Configuration .................................................................... 4 - 4 4.3 Digital Output Signal Properties .............................................................. 4 - 5 4.3.1 Channels .................................................
Preface CP383 6.2 General ....................................................................................................6 - 3 6.3 Shielding ..................................................................................................6 - 3 6.4 Debouncing for Digital Inputs ...................................................................6 - 3 6.5 Process-Side Signal Conditioning for Digital Inputs ................................6 - 4 6.6 External Power Supply for Digital Outputs .............
CP383 Preface 27784.01.VC.040308/162541 1-2 System Relevant Information ................................................................... 1 - 7 1-3 CP383 Main Specifications .................................................................... 1 - 10 1-4 CP383 Digital Input Specifications ......................................................... 1 - 11 1-5 CP383 Digital Output Specifications ...................................................... 1 - 11 1-6 Applied Standards ....................
Preface CP383 ROM Status Register .............................................................................. 4 - 17 4-25 ROM Data Register ................................................................................ 4 - 17 5-1 Maximum Input Power Voltage Limits ...................................................... 5 - 3 5-2 DC Input Voltage Ranges ......................................................................... 5 - 3 5-3 Input Voltage Characteristics .............................
CP383 Preface List of Figures 1-1 CP383 System Level Interfacing Diagram ............................................... 1 - 8 1-2 CP383 Front Panel .................................................................................. 1 - 9 1-3 CP383 Board (Front View) ....................................................................... 1 - 9 2-1 CP383 Board Level Interfacing ................................................................
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CP383 Preface Proprietary Note This document contains information proprietary to Kontron Modular Computers GmbH. It may not be copied or transmitted by any means, disclosed to others, or stored in any retrieval system or media without the prior written consent of Kontron Modular Computers GmbH or one of its authorized agents. The information contained in this document is, to the best of our knowledge, entirely correct.
Preface CP383 Explanation of Symbols CE Conformity This symbol indicates that the product described in this manual is in compliance with all applied CE standards. Please refer also to the section “Applied Standards” in this manual. Caution, Electric Shock! This symbol and title warn of hazards due to electrical shocks (> 60V) when touching products or parts of them.
CP383 Preface For Your Safety Your new Kontron product was developed and tested carefully to provide all features necessary to ensure its compliance with electrical safety requirements. It was also designed for a long fault-free life. However, the life expectancy of your product can be drastically reduced by improper treatment during unpacking and installation.
Preface CP383 General Instructions on Usage In order to maintain Kontron’s product warranty, this product must not be altered or modified in any way. Changes or modifications to the device, which are not explicitly approved by Kontron Modular Computers GmbH and described in this manual or received from Kontron’s Technical Support as a special handling instruction, will void your warranty.
CP383 Preface Two Year Warranty Kontron Modular Computers GmbH warrants their own products, excluding software, to be free from manufacturing and material defects for a period of 24 consecutive months from the date of purchase. This warranty is not transferable nor extendible to cover any other users or longterm storage of the product. It does not cover products which have been modified, altered or repaired by any other party than Kontron Modular Computers GmbH or their authorized agents.
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Introduction Chapter 1 27784.01.VC.040308/162542 Introduction ID 27784, Rev.
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CP383 Introduction 1. Introduction 1.1 System Overview Many system relevant CompactPCI features that are specific to Kontron Modular Computers CompactPCI systems may be found described in the Kontron CompactPCI System Manual. Please refer to the section “Related Publications” at the end of this chapter for the relevant ordering information. The CompactPCI System Manual includes the following information: 27784.01.VC.
Introduction 1.2 CP383 Product Overview The CP383 Digital Input and Digital Output Controller is part of a comprehensive concept to provide CompactPCI system integrators with a complete range of CompactPCI I/O products which include the functions of analog input, analog output, digital input, and digital output implemented as separate individual boards. This concept ensures a maximum degree of system design flexibility thus allowing efficient and effective usage of available resources.
CP383 Introduction The following table provides a quick overview of the CP383 board.
Introduction 1.3.1.1 CP383 Board Introduction - Digital Input The digital input cluster consists of 16 input channels. The source of the digital inputs must be a voltage generator. The board accepts only differential voltages up to a maximum of +30V. The input current is limited to 5 mA over the specified input voltage range. Input signal processing begins with the presentation of the signal to the front panel connector.
CP383 Introduction • 16 channels of input signal conditioning • 16 channels of output signal conditioning: 4 HSD switches (4 channels per switch, 2 switches per cluster) • Optoisolation for each input and output channel from the system side • One FPGA (the DIO ProComm Controller) • One CompactPCI bus connector (CON1, board to backplane, 132-pin, female, six row) • One EEPROM (CapROM) 1.
Introduction 1.5 CP383 Board Diagrams The following diagrams illustrate board functionality and component layout. 1.5.1 System Level Interfacing Figure 1-1: CP383 System Level Interfacing Diagram CompactPCI System PRELIMINARY System Master CPCI BUS Digital Input and Output System CP383 CP383 n 1 digital input digital input 16 max 16 max 1 1 digital input digital output digital output 16 max 16 max 1 1 digital output Page 1 - 8 27784.01.VC.
CP383 1.5.2 Introduction Front Panel Figure 1-2: CP383 Front Panel CP 383 RUN FAIL 1.5.3 PRELIMINARY A green “Run” LED and a red “Fail” LED have been placed on the front panel, to cater for the most likely use of these LEDs. However, they are user configurable and may be employed for user defined purposes. Board Layout Figure 1-3: CP383 Board (Front View) O P T O LED1 Digital Input Signal Conditioning C O N 2 27784.01.VC.040308/162542 Channels 0 ...
Introduction 1.
CP383 Introduction Table 1-4: CP383 Digital Input Specifications TYPE Input Voltage Range DESCRIPTION Low: -3V to +5V Channels 16 channels isolated from the system side. They do not share common GND or VCC. Channel Connections 2 pins per channel; differential input Input Filter (edge frequency) 10 kHz Input Protection 8 kV ESD Isolation 2 kV process to system Input Impedance Minimum: 1.
Introduction CP383 Table 1-5: CP383 Digital Output Specifications (Continued) TYPE Signal Output Overcurrent Protection DESCRIPTION For output currents of greater than 0.8 A, the output will be switched to a failure mode: square wave signal with a maximum current amplitude of 0.4A and an on/off time (t on, t off) of 100 µs. Undervoltage Protection for external power supply For the voltage source (EXTVCC) <= +8.5V, the outputs are switched off.
CP383 1.9 Introduction Related Publications Table 1-7: Related Publications ISSUED BY CompactPCI Systems PICMG CompactPCI Specification, V. 2.0, Rev. 3.0 Kontron Modular Computers CompactPCI Systems Manual (ID 19953) ST Microelectronics L6376 0.5A High-Side Driver Quad Intelligent Power Switch 27784.01.VC.040308/162542 PRELIMINARY CP383 DOCUMENT ID 27784, Rev.
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Functional Description Chapter 21 27784.01.VC.040308/162543 Functional Description ID 27784, Rev.
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CP383 2. Functional Description Functional Description The following chapters present more detailed, board level information about the CP383 Digital Input and Digital Output Controller whereby the board components and their basic functionality are discussed in general. 2.
Functional Description CP383 Figure 2-1: CP383 Board Level Interfacing CP383 Digital Input and Digital Output Controller CPCI Interface PRELIMINARY DIO ProComm Controller Optoisolation DIGOUT A CLUSTER DIGOUT B CLUSTER DIGIN CLUSTER Signal Cond. Signal Cond. HSD SWITCH HSD SWITCH Signal Cond. Outputs 0 ... 7 Reset & Supply Voltage Digital Output Page 2 - 4 Inputs 0 ... 15 © 2004 Kontron Modular Computers GmbH Digital Input ID 27784, Rev. 01 27784.01.VC.
CP383 2.3 Functional Description Digital Input Signal Conditioning The digital input signal conditioning consists of the following: 2.4 Overvoltage protection Low-pass signal filtering Current limitation Inverse polarity protection Input signal high-low determination Output signal stabilization buffering Digital Output Signal Conditioning The major element of the digital output signal conditioning is the HSD switches which are able to drive inductive, capacitive or resistive loads.
Functional Description CP383 Digital inputs, digital outputs, external voltage, and external reset are routed via the CON2 connector. Interfacing to the CompactPCI bus is accomplished via the CON1 connector. Test and program development is supported by the CON3 connector. External supply for each output cluster: The connection for the external supply (+24V DC [9.5V to 35V] for each output cluster) is realized by reserved/defined pins within each output cluster at the front panel connector CON2. Note ...
CP383 Functional Description Table 2-1: Pinout of the Digital Input and Output Interface Connector CON2 DIGIN DIGOUT A SIGNAL PIN SIGNAL PIN SIGNAL 42 DIN0- 21 DIN0+ 62 DIN1+ 41 DIN2+ 20 DIN1- 61 DIN2- 40 DIN3- 19 DIN3+ 60 DIN4+ 39 DIN5+ 18 DIN4- 59 DIN5- 38 DIN6- 17 DIN6+ 58 DIN7+ 37 DIN8+ 16 DIN7- 57 DIN8- 36 DIN9- 15 DIN9+ 56 DIN10+ 35 DIN11+ 14 DIN10- 55 DIN11- 34 DIN12- 13 DIN12+ 54 DIN13+ 33 DIN14+ 12 DIN13- 53 DIN14 - 32 DIN15- 1
Functional Description 2.7.2 CP383 CPCI Interface and Pinout The CPCI interface is based on the specification PICMG 2.0 R 3.0, 10/1/99. The following figure and table indicate the pin layout and pinout of the CPCI connector, CON1 (J1).
CP383 2.8 Functional Description CapROM EEPROM The CapROM is a 4 kbit (512 byte) EEPROM which provides the capability to store board control relevant information to allow software configuration of the CP383. 2.9 Monitor and Control (M/C) Various monitor and control functions are available for the operation of the CP383. The front panel of the board is equipped with two LEDs for user-defined purposes.
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Installation Chapter 31 27784.01.VC.040308/162543 Installation ID 27784, Rev.
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CP383 3. Installation Installation The CP383 has been designed for easy installation. However, the following standard precautions, installation procedures, and general information must be observed to ensure proper installation and to preclude damage to the board or injury to personnel. 3.1 Hardware Installation The product described in this manual can be installed in any available 3U slot of a CompactPCI system except for the system master slot.
Installation 3.1.2 CP383 Installation Procedures To install the board proceed as follows: 1. Ensure that the safety requirements indicated above are observed. Warning! Failure to comply with the instruction below may cause damage to the board or result in improper system operation. Please refer to chapters 4 and 5 for configuration information. 2. Ensure that the board is properly configured for operation before installing.
CP383 3.1.3 Installation Removal Procedures To remove the board proceed as follows: 1. Ensure that the safety requirements indicated above are observed. Warning! Care must be taken when applying the procedures below to ensure that when the board is removed it is not damaged through contact with other boards in the system. 1. Unlock the insertion/extraction handle by pressing down on the grey locking mechanism in the middle of the handle. (This should be achievable with a minimum of force.
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Configuration Chapter 41 27784.01.VC.040308/162543 Configuration ID 27784, Rev.
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CP383 4. Configuration Configuration This chapter provides information for configuring the CP383 board for operation. 4.1 Jumper Settings The CP383 does not have any jumpers which require configuring. 4.2 Digital Input Signal Requirements 4.2.1 Channels The CON2 connector of the CP383 provides two input pins per channel. This allows each channel to be configured separately as required.
Configuration 4.2.3 CP383 Channel Configuration The following figure illustrates the typical schematic of an input channel. Figure 4-2: Input Channel Schematic System Input Cluster to system Signal Input D JFET Signals require to be connected: plus to plus, minus to ground as shown in figure 4-3 below. Figure 4-3: Input Configuration (Example for Channel 0) CP383 + Voltage Source DIGIN0+ Pin21 V DIGIN0Pin42 CON2 27784.01.VC.
CP383 Configuration Figure 4-4: Configuration Diagram for All Input Channels Digital Sensors CON2 Ch 0 + V Ch 15 CP383 4.3 Digital Output Signal Properties In addition to the output signal type and its range, which have been specified in table 1-5, system integrators must be aware of certain output configuration requirements for the CP383. The following paragraphs provide some information regarding individual connection configuration requirements. 4.3.
Configuration 4.3.3 CP383 Channel Connection The following diagrams illustrate the external connection of the CP383 to the application. Figure 4-5: Digital Output Connection for One Cluster CON2 Supply Voltage External VCC + Ch 0 1 Ch 1 7 Ch 7 LOAD V LOAD EXTGND CP383 External GND Figure 4-6: Digital Output Circuit for One Channel CON2 Supply Voltage External VCC Rds, on External VCC + V 0 Ch 0 LOAD EXTGND External GND Page 4 - 6 27784.01.VC.
CP383 Configuration Figure 4-7: External Reset Connection for One Cluster Supply Voltage External VCC CON2 0 Ch 0 7 Ch 7 R Reset + V LOAD LOAD CP383 External GND Note ... The voltage source for each cluster is an external supply (in the range +9.5V to +35V DC). Therefore the GND reference for the digital output is the ground potential of this external voltage supply. Note ...
Configuration CP383 4.4 Programming Interface 4.4.1 Access Control Logic (Address Decoder) All the resources of the CP383 are mapped within the 64 kB PCI memory address space which itself is set in the PCI configuration register BAR0. The port size of all local or backend registers is 32-bit by default. The address map of the registers is as follows.
CP383 Configuration Table 4-1: Backend Register Address Map (Continued) BASE ADDRESS (BAR0) SIZE FUNCTION 0x441C 32 bit c_msk 0x4800 32 bit i_event, Input Status Register 0x4C00 32 bit d_in, Input Data Register 0x4C04 32 bit input, Transparent Input Data + 0x5000 44 kB Reserved Reading Input Data The input ports are made visible via the Input Data Register. This register reflects the inputs after them having passed the digital programmable debouncer.
Configuration CP383 Table 4-4: Input Control Register BITS TYPE DEFAULT FUNCTION 31-8 R/W 0 RESERVED 7 r/w 0 Input enable 6 r/w 0 Event detect enable 5 r/w 0 Latch mode enable 4 r/w 0 Pattern detect enable 2-0 r/w 000 Debounce control deb [2 ... 0] The inputs are sampled through the debouncer after the Input Enable bit is set.
CP383 Configuration Table 4-6: Input Event Mask Register 31-16 r/w 0 Not used 15 - 0 r/w 1 Input event mask bits Note ... A set bit means that event detection is disabled for the corresponding input port. BITS TYPE DEFAULT FUNCTION 31-16 r/w 0 Not used 15 - 0 r/w 0 Input event polarity bits Note ... A bit setting of 0 bit means that an event is detected when the input port changes from 0 to 1 whereas a setting of 1 means that an event is detected when the input changes from 1 to 0.
Configuration 4.4.5 CP383 Latching on Input Events In addition to the standard event detection described above, there is a latch mode extension. This mode is used in cases where it is necessary to capture the inputs when one of the defined events occurs. Table 4-9: Input Latch-on-Event Register BITS TYPE DEFAULT FUNCTION 31-16 r 0 Not used 15 – 0 r 0 Latch on event, enable bits to activate A set bit means that a detected event on the corresponding input is latched.
CP383 4.4.7 Configuration Writing Output Data Table 4-12: Output Data Register BITS TYPE DEFAULT FUNCTION 31-8 r/w 0 Reserved 7-0 r/w 0 Data, 8-bit digit Note ... Output data is 8 bit (each cluster); this register is read/write enable. BITS TYPE DEFAULT FUNCTION 31-2 r/w 0 Reserved 1 r/w 0 irqen 0 r/w 1 Reset PRELIMINARY Table 4-13: Output Control Register Note ... irqen is for diagnostic issuing an interrupt. The reset bit should be set to 0 to activate a cluster.
Configuration 4.4.8 CP383 Hardware Debug/Test Registers These registers are for internal test and debug only. The Common Status Register contains logic version and PCB version. The Common Debug Register is a read/write register without any further functionality besides the front panel monitor and control LEDs.
CP383 Configuration Note ... The board will continue issuing an interrupt until all interrupt sources are handled completely and no interrupt condition remains. Table 4-17: General Interrupt Enable Register BITS TYPE DEFAULT FUNCTION 31 r/w 0 Board Interrupt Enable 30 - 0 r/w 0 Reserved Note ... Table 4-18: General Interrupt Pending Register BITS TYPE DEFAULT FUNCTION 31 r/w 0 Board Interrupt Pending 29 - 0 r/w 0 Reserved Note ...
Configuration 4.4.10 CP383 Programming the Board Capability ROM The Board Capability ROM contains all the board data necessary to identify board, version, optional features, etc., and to setup the basic software. The BCR is implemented using a 4 kbit serial EEPROM of the type Microchip 93LC66. (The contents list of the BCR is not described here.) Programming of the BCR is undertaken as follows: The control word is written into the ROM Control Register including command opcode and internal address.
CP383 Configuration Table 4-23: Opcodes and Commands OPCODE A8 ... A0 COMMAND 00 11xxxxxxx EWEN 10 xxxxxxxxx READ 01 xxxxxxxxx WRITE Note ... Table 4-24: ROM Status Register BITS TYPE DEFAULT FUNCTION 31 r/w 0 Busy/Ready 30-0 r/w 00 Reserved Note ... As soon as the Startbit is set the Busy/Ready bit becomes active (Busy=1). It remains set as long as the command is executed and is reset when command execution is complete.
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CP383 Power Consumption Chapter 5 Power Consumption ID 27784, Rev.
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CP383 Power Consumption 5. Power Consumption 5.1 System Power The new Intel Pentium M processor family requires substantially more power than earlier Pentium lll processors, although less than the Pentium 4. This results in special requirements for the power supply and the backplane. The considerations presented in the ensuing chapters must be taken into account by system integrators when specifying the CP383 system environment. 5.1.
Power Consumption 5.1.2 CP383 Backplane The backplane to be used with the CP383 must be adequately specified and must provide optimal power distribution for the +3.3 V power input. 5.1.3 Power Supply Units The start-up behavior of CPCI and PCI (ATX) power supplies is critical for all new CPU boards. These boards require a defined power of sequence and start-up behavior of the power supply. The required behavior is described in the ATX (http://www.formfactors.org/FFDetail.
CP383 5.1.3.3 Power Consumption Tolerance The tolerance of the voltage lines is described in the CPCI specification (PICMG 2.0 R3.0).The recommended measurement point for the voltage is the CPCI connector on the CPU board. The following table provides information regarding the required characteristics for each board input voltage. Table 5-3: Input Voltage Characteristics VOLTAGE NOMINAL VALUE TOLERANCE MAX. RIPPLE (p-p) REMARKS 5V +5.0 VDC +5%/-3% 50 mV Not required 3.3 V +3.
Power Consumption 5.2 CP383 Power Consumption Table The goal of this description is to provide a method to calculate the power consumption for the CP383 baseboard and for additional configurations. The power consumption table below indicates the voltage for the CP383 board. The value was measured using an 8-slot passive CompactPCI backplane with the power supply. The operating systems used was Windows® 2000. All measurement were conducted at a temperature of 25°C.
System Considerations Chapter 61 27784.01.VC.040308/162549 System Considerations ID 27784, Rev.
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CP383 System Considerations 6. System Considerations 6.1 Introduction In addition to the basic specification requirements for the CP383 which have been addressed in chapter 4, system integrators need to be aware of the overall system environment and the application needs when designing the interfacing to the CP383. The following chapters address a number of more apparent considerations which should be addressed, but certainly not all of the possible situations which may be encountered.
System Considerations CP383 CLOCK DIVIDER INPUT SAMPLE CLOCK @ 33 MHz PCI CLK INPUT SAMPLE PERIOD @ 33 MHz PCI CLK 1 (default value - see note below) 33 MHz 30 ns 2^8 128 kHz 8 µs 2^10 32 kHz 32 µs 2^12 8 kHz 128 µs 2^14 2 kHz 0.5 ms 2^16 0.5 kHz 2 ms 2^18 125 Hz 8 ms 2^20 31 Hz 32 ms Note ... The clock divider default value is 1. In addition to the choice of debouncing filters, there is an analog filter implemented on board with an edge frequency at 10 kHz. 6.