User Manual

Configuration CP382
Page 4 - 8 © 2002 PEP Modular Computers GmbH ID 24208, Rev. 01
4.3.3 Hardware Debug/Test Registers
These registers are for internal test and debug only. The Common Status Register contains
Logic-Version and PCB -Version. The Common Debug Register is a read/write register without
any further functionality besides the front panel monitor and control LED’s.
Table 4-5: Hardware Debug Register Bit Map
Bits Type Default Function
31-2 r/w 0 Reserved
1r/w0FAIL
0r/w0RUN
Table 4-6: Hardware Status Register Bit Map
Bits Type Default* Function
31-16 r 0 Reserved
15-8 r 00 HW Version (PCB Index)
7-0 r 01 Logic Version
Note...
The HW version starts with 0, the Logic version starts with 1. At each further
release it will be incremented by 1.