CP381 30 Channel CompactPCI Digital Input Controller Manual ID: 24107, Rev. Index 01 February 2002 The product described in this manual is in compliance with all applied CE standards.
Preface CP381 Revision History Manual/Product Title: CP381 Manual ID Number: 24107 Rev. Index 01 Brief Description of Changes Initial Issue Board Index 00 Date of Issue Feb. 2002 Imprint Copyright © 2002 PEP Modular Computers GmbH. All rights reserved. This manual may not be copied, photocopied, reproduced, translated or converted to any electronic or machinereadable form in whole or in part without prior written approval of PEP Modular Computers GmbH.
CP381 Preface Table of Contents Revision History ........................................................................................................ ii Imprint ....................................................................................................................... ii Table of Contents ..................................................................................................... iii List of Figures ..................................................................................
Preface CP381 Chapter 2. 2 Functional Description ................................................................................ 2 - 3 2.1 General Information ............................................................................... 2 - 3 2.1.1 Signal Conditioning ....................................................................... 2 - 3 2.1.2 DI ProComm Controller ................................................................. 2 - 3 2.1.3 System Interfaces ..........................
CP381 Preface Chapter 4. Configuration .............................................................................................. 4 - 3 4.1 Jumper Settings .................................................................................... 4 - 3 4.2 Digital Input Signal Requirements. ........................................................ 4 - 3 4.2.1 Channels ....................................................................................... 4 - 3 4.2.2 Signal Characteristics ...........
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CP381 Preface List of Figures 1-1 CP381 System Level Interfacing Diagram ............................................... 1 - 7 1-2 CP381 Front Panel .................................................................................. 1 - 8 1-3 CP381 Board (Front View) ....................................................................... 1 - 8 2-1 CP381 Board Level Interfacing ................................................................
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CP381 Preface List of Tables 1-1 CP381 Product Overview ......................................................................... 1 - 4 1-2 System Relevant Information ................................................................... 1 - 6 1-3 CP381 Main Specifications ...................................................................... 1 - 9 1-5 Applied Standards .................................................................................. 1 - 10 1-6 Related Publications ...............
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CP381 Preface Proprietary Note This document contains information proprietary to PEP Modular Computers. It may not be copied or transmitted by any means, disclosed to others, or stored in any retrieval system or media without the prior written consent of PEP Modular Computers GmbH or one of its authorized agents. The information contained in this document is, to the best of our knowledge, entirely correct.
Preface CP381 Explanation of Symbols CE Conformity This symbol indicates that the product described in this manual is in compliance with all applied CE standards. Please refer also to the section “Applied Standards” in this manual. Caution, Electric Shock! This symbol and title warn of hazards due to electrical shocks (> 60V) when touching products or parts of them.
CP381 Preface For Your Safety Your new PEP product was developed and tested carefully to provide all features necessary to ensure its compliance with electrical safety requirements. It was also designed for a long faultfree life. However, the life expectancy of your product can be drastically reduced by improper treatment during unpacking and installation.
Preface CP381 General Instructions on Usage In order to maintain PEP’s product warranty, this product must not be altered or modified in any way. Changes or modifications to the device, which are not explicitly approved by PEP Modular Computers and described in this manual or received from PEP Technical Support as a special handling instruction, will void your warranty.
CP381 Preface Two Year Warranty PEP Modular Computers grants the original purchaser of PEP products a TWO YEAR LIMITED HARDWARE WARRANTY as described in the following. However, no other warranties that may be granted or implied by anyone on behalf of PEP are valid unless the consumer has the express written consent of PEP Modular Computers.
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CP381 Introduction Chapter 1 Introduction ID 24107, Rev.
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CP381 Introduction 1. Introduction 1.1 System Overview The CompactPCI board described in this manual operates with the PCI bus architecture to support additional I/O and memory-mapped devices as required by various industrial applications. For detailed information concerning the CompactPCI standard, please consult the complete Peripheral Component Interconnect (PCI) and CompactPCI Specifications.
Introduction 1.2 CP381 Product Overview The CP381 Digital Input controller is part of a comprehensive concept whose goal is to provide CompactPCI system integrators with a complete range of CompactPCI I/O products which include the functions of analog input, analog output, digital input and digital output implemented on separate individual boards. This concept ensures the maximum degree of system design flexibility thus allowing for the efficient and effective usage of available resources.
CP381 Introduction 1.3 Board Overview 1.3.1 Board Introduction The CP381 is a 30 channel digital input board. The source of the digital inputs must be a voltage generator. The board accepts only single-ended voltages up to a maximum of +30V. The input current is limited to 5 mA over the specified input voltage range. Input signal processing begins with the presentation of the signal to the front panel connector.
Introduction 1.4 CP381 System Relevant Information The following system relevant information is general in nature but should still be considered when developing applications using the CP381. Table 1-2: System Relevant Information SUBJECT INFORMATION System Configuration The CP381 operates with a system clock frequency of 33 MHz. The number of CP381’s which can be installed in any one system depends solely on the number of CPCI slots available.
CP381 1.5 Introduction Board Diagrams The following diagrams illustrate board functionality and component layout. 1.5.1 System Level Interfacing Figure 1-1: CP381 System Level Interfacing Diagram CompactPCI System System Master CPCI - BUS Digital Input System CP381 CP381 n 1 digital input digital input 30 max 30 max 1 digital input ID 24107, Rev.
Introduction 1.5.2 CP381 Front Panel Figure 1-2: CP381 Front Panel LEGEND: CP 381 RUN HIT 1.5.3 “RUN” and “HIT” are status LED’s. The different LED status combinations are illustrated and an explanation of their meaning given in the Operation M/C section in chapter 2.5 Board Layout Figure 1-3: CP381 Board (Front View) O P T O LED1 Channels 0...
CP381 1.
Introduction CP381 Table 1-4: CP381 Analog Input Specifications TYPE DESCRIPTION Input Voltage Range Low: -3V to +5V High: +11V to +30V Channels 30 channels Channel Connections 2 pins per channel Input Filter (edge frequency) 10 kHz Input Protection 8 kV ESD Isolation 2 kV process to system Input Impedance Minimum: 1.5 k ohm Maximum: 6 k ohm at 30V 1.
CP381 Functional Description Chapter 2 Functional Description ID 24107, Rev.
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CP381 2. Functional Description Functional Description The following sections present more detailed, board level information about the CP381 digital input controller whereby the board components and their basic functionality are discussed in general. 2.
Functional Description 2.1.3 CP381 System Interfaces The CP381 provides interfacing capability for the following system elements: • Digital input • CompactPCI bus • Test and program development: JTAG/ISP Digital input interfacing is achieved via the CON2 connector. Interfacing to the CompactPCI bus is accomplished via the CON1 connector. Test and program development is supported by the CON3 connector. 2.1.
CP381 2.2 Functional Description Board Level Interfacing Diagram The following figure demonstrates the interfacing structure between the internal processing modules of the CP381 and other major CP381 system components. Where CP381 system elements have common interfacing they are grouped into a block. Interfacing common to only one element of a block is indicated with a direct connecting line. The interfacing lines are shown in white where they are onboard and in black for board external interfacing.
Functional Description 2.3 System Interfaces 2.3.1 Digital Input Interface CP381 The digital input interface is routed through the CON2 connector. The following figure and table indicate the pin layout and pinout of this connector.
CP381 Functional Description Table 2-1: Pinout of the Digital Input Interface Connector CON2 PIN SIGNAL PIN SIGNAL PIN SIGNAL 1 NC 22 NC 43 DIGIN 29- 2 DIGIN 28- 23 DIGIN 29+ 44 DIGIN 28+ 3 DIGIN 27+ 24 DIGIN 27- 45 DIGIN 26- 4 DIGIN 25- 25 DIGIN 26+ 46 DIGIN 25+ 5 DIGIN 24+ 26 DIGIN 24- 47 DIGIN 23- 6 DIGIN 22- 27 DIGIN 23+ 48 DIGIN 22+ 7 DIGIN 21+ 28 DIGIN 21- 49 DIGIN 20- 8 DIGIN 19- 29 DIGIN 20+ 50 DIGIN 19+ 9 DIGIN 18+ 30 DIGIN 18- 51 DIGIN 1
Functional Description 2.3.2 CP381 CompactPCI Interface and Pinout The CompactPCI interface is based on the specification PICMG 2.0 R 3.0, 10/1/99. The following figure and table indicate the pin layout and pinout of the CompactPCI connector, CON1 (J1).
CP381 Functional Description 2.3.3 Test and Program Development 2.3.3.1 JTAG/ISP Interface and Pinout A JTAG/ISP interface is provided on the CP381 for the manufacturer’s use (logic programming, JTAG test). This is a SAMTEC 10-pin, male, dual row connector (0.050” pin pitch). Figure 2-4: JTAG Connector (CON3) 2 10 1 9 Table 2-3: JTAG Connector (CON3) Pinout SIGNAL PIN PIN SIGNAL TCK 1 2 GND TDO 3 4 3.3V TMS 5 6 NC NC 7 8 NC TDI 9 10 GND 2.
Functional Description 2.5 CP381 Monitor and Control (M/C) Monitor and Control functions are divided essentially into Pre-operation and Operation. Pre-operation M/C deals with board configuration and system requirements. Operation M/C covers direct operator interfaces. 2.5.1 Pre-Operation M/C Pre-operation M/C is a direct function of the application and the system requirements. These requirements dictate the digital input configuration as well as the overall system integration.
CP381 Installation Chapter 3 Installation ID 24107, Rev.
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CP381 3. Installation Installation The CP381 has been designed for easy installation. However, the following standard precautions, installation procedures and general information must be observed to ensure proper installation and to preclude damage to the board or injury to personnel. 3.1 Hardware Installation The product described in this manual can be installed in any available 3U slot of a CompactPCI system except for the system master slot. 3.1.
Installation 3.1.2 CP381 Installation Procedures To install the board proceed as follows: 1. Ensure that the safety requirements indicated above are observed. Warning! Failure to comply with the instruction below may cause damage to the board or result in improper system operation. Please refer to chapters 4 and 5 for configuration information. 2. Ensure that the board is properly configured for operation before installing. Note...
CP381 3.1.3 Installation Removal Procedures To remove the board proceed as follows: 1. Ensure that the safety requirements indicated above are observed. Warning! Care must be taken when applying the procedures below to ensure that when the board is removed it is not damaged through contact with other boards in the system. 2. Disconnect any interfacing cables that may be connected to the board. 3. Loosen both of the front panel retaining screws. 4.
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CP381 Configuration Chapter 4 Configuration ID 24107, Rev.
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CP381 4. Configuration Configuration This chapter provides information for configuring the CP381 board for operation. 4.1 Jumper Settings The CP381 does not have any jumpers which require configuring. 4.2 Digital Input Signal Requirements. In addition to the input signal type and its range, which have been specified in chapter 1, paragraph 1.3.1, system integrators must be aware of certain input configuration requirements for the CP381.
Configuration 4.2.3 CP381 Channel Configuration Signals require to be connected: plus to plus, minus to ground as shown in figure 4-2 below Figure 4-2: Input Configuration (Example for Channel 0) CP381 + Voltage Source DIGIN0+ Pin21 V DIGIN0Pin42 CON2 Figure 4-3: Configuration Diagram for All Channels Digital Sensors CON2 Ch 0 + V Ch n Ch 29 CP381 Page 4 - 4 © 2002 PEP Modular Computers GmbH ID 24107, Rev.
CP381 Configuration Figure 4-4: Configuration Diagram for All Channels CON2 Digital Sensors + Ch 0 Ch n V Ch 29 CP381 ID 24107, Rev.
Configuration CP381 4.3 Programming Interface 4.3.1 Access Control Logic (Address Decoder) All the resources of the CP381 are mapped within the 64 kB PCI memory address space which itself is set in the PCI configuration register BAR0. The port size of all local or backend registers is 32-bit by default. The address map of the registers is as follows.
CP381 4.3.2 Configuration Reading Input Data The input ports are made visible via the Input Data Register. This register reflects the inputs after them having passed the digital programmable debouncer. An active input appears there as a logical "1" whereas an open or inactive input port appears as a logical "0". The bit ordering naturally corresponds with the numbering of the input ports at the connector.
Configuration 4.3.3 CP381 Debouncing Inputs By default, all inputs are filtered through a passive analog low-pass filter placed immediately behind the input connector. Additionally, the CP381 provides a programmable digital debouncer which is common for all inputs. It functions as follows; the input ports are sampled at a programmable sample rate which is derived from PCI bus clock. Two consecutive samples must be equal before being stored in the input data register.
CP381 4.3.4 Configuration Detecting Input Events Detecting events on input means that the CP381 hardware can supervise the input ports upon their changing state and without being continuously polled. This mode is controlled by three control registers. In the Input Event Mask Register, individual input events can be enabled which should be monitored. In the Input Polarity Register the direction of the change-of-state is set. Detected events are reported in the corresponding Input Event Status Register.
Configuration 4.3.5 CP381 Latching on Input Events In addition to the standard event detection described above, there is a latch mode extension. This mode is used in cases where it is necessary to capture the inputs when one of the defined events occurs. Table 4-9: Input Latch-on-Event Register, Bit Map Bits 31-30 29 – 0 Type r r Default 0 0 Function Not used Latch on event, enable bits to activate Note... A set bit means that a detected event on the corresponding input is latched.
CP381 4.3.7 Configuration Hardware Debug/Test Registers These registers are for internal test and debug only. The Common Status Register contains Logic-Version and PCB -Version. The Common Control Register is a read/write register without any further functionality. Neither of these registers should be used by standard software.
Configuration 4.3.8 CP381 Generating Interrupts Any detected event or, more clearly, any event flag set in the Input Status Register can trigger an interrupt. Thus, any input can be enabled individually for interrupt generation.
CP381 4.3.9 Configuration Programming the Board Capability ROM The Board Capability ROM contains all the board data necessary to identify board, version, optional features, etc., and to setup the basic software. The BCR is implemented using a 4 KBit serial EEPROM of the type Microchip 93LC66. (The contents list of the BCR is not described here.
Configuration CP381 Table 4-19: Opcodes and Commands Opcode A8..A0 Command 00 10 01 11xxxxxxx xxxxxxxxx xxxxxxxxx EWEN READ WRITE Note... The EWEN (Erase and Write Enable) command must be executed once before the first write. Table 4-20: ROM Status Register Bit Map Bits 31 30-0 Type r/w r/w Default 0 00 Function Busy/Ready Reserved Note... As soon as the Startbit is set the Busy/Ready bit becomes active (Busy=1).
CP381 System Considerations Chapter 5 System Considerations ID 24107, Rev.
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CP381 System Considerations 5. System Considerations 5.1 Introduction In addition to the basic specification requirements for signals being presented to the CP381 which have been addressed in chapter 4, system integrators need to be aware of the overall system environment and the application needs when designing the interfacing to the CP381.
System Considerations 5.4 CP381 Debouncing On the CP381 it is possible to select from a number of debouncing times, dependant on the type of switches/sensors in use. For example, when using mechanical switches or relays to switch the input, bouncing will always occur and therefore debouncing is necessary. A debounce period may be selected from a range of values available, accessible via software in the register depending on the settle time.