Instruction Manual

Configuration CP372

25780.01.VC.021121/111238

P R E L I M I N A R Y

Note: The Startbit will automatically be reset as soon as an action is completed.

Note: The commands READ, EWEN (write enable) and WRITE are sufficient for all

purposes.

Note: The EWEN (Erase and Write enable) command must be executed once before the first

write.

Note: As soon as the Startbit is set the Busy/Ready bit becomes active (Busy=1). It remains set

as long as the command is executed and is reset when command execution is complete.

Table 4-5: ROM Command Register Bit Map

BITS TYPE DEFAULT FUNCTION

31 R/W 0 Startbit

30 - 0 R/W 00 reserved

Table 4-6: ROM Control Register Bit Map

BITS TYPE DEFAULT FUNCTION

31 - 18 R/W 0 reserved

17 - 16 R/W 00 Opcode

15 - 9 R/W 00 reserved

8 - 0 R/W 00 internal address (A8..A0)

Table 4-7: Opcodes and Commands

OPCODE A8 … A0 COMMAND

00 11xxxxxxx EWEN

10 xxxxxxxxx READ

01 xxxxxxxxx WRITE

Table 4-8: ROM Status Register Bit Map

BITS TYPE DEFAULT FUNCTION

31 R/W 0 Busy

30 - 0 R/W 00 reserved