User guide

Configuration CP371

Note: The EWEN (Erase and Write enable) command must be executed once before the first

write.

Note: As soon as the Startbit is set the Busy/Ready bit becomes active (Busy=1). It remains set

as long as the command is executed and is reset when command execution is complete.

4.3.4 Common Board Registers

These registers are for internal test and debug only. The Common Status Register contains

Logic- Version and PCB- Version. The Common Control Register is a read/write register with-

out any further functionality. Neither of these should be used by standard software.

Table 4-7: Opcodes and Commands

OPCODE A8 … A0 COMMAND

00 11xxxxxxx EWEN

10 xxxxxxxxx READ

01 xxxxxxxxx WRITE

Table 4-8: ROM Status Register Bit Map

BITS TYPE DEFAULT FUNCTION

31 R/W 0 Busy

30 - 0 R/W 00 reserved

Table 4-9: ROM Data Register Bit Map

BITS TYPE DEFAULT FUNCTION

31-8 R/W 0 reserved

7-0 R/W 0 Data (for data read and write commands)

Table 4-10: Hardware Debug Register Bit Map

BITS TYPE DEFAULT FUNCTION

31-0 R/W 0 reserved