User guide

CP371 Functional Description

2. Functional Description

The following chapters present more detailed, board level information about the CP371 analog

input controller whereby the board components and their basic functionality are discussed in

general.

2.1 General Information

The CP371 is comprised basically of the following:

• Signal conditioning

• Analog to digital converter

• ADC ProComm controller

• Realized in an FPGA device

• Controls analog data acquisition and provides interfacing to the CPCI bus

• System interfaces for:

• Analog inputs

• Two, 8 channel clusters: Cluster A, Cluster B

• One, 62-pin, female, 3-pin row, D-sub connector (CON2)

• CompactPCI bus

• 132-pin, female, 6-pin row connector (CON1)

• CompactPCI specification

• Testing and program development (JTAG/ISP) connector (CON3)

• On board memory: Capability EEPROM (CapROM)

• Monitor and Control

• Two each, green status LED’s for cluster activation (channels 0-7 and 8-15)

• Registers

• Software

2.1.1 Signal Conditioning

Analog input signal conditioning is comprised of two clusters (A and B) each of the following:

• Over-voltage and over-current protection

• Low-pass signal filtering

• Input conversion (differential and current) to single-ended

• Signal pre-conditioning (gain and offset) prior to presentation to the ADC

2.1.2 Analog to Digital Converter

For each cluster there is one, eight channel, 12-bit analog to digital converter (ADC) available.

After a cluster is activated, sampling is done starting with the lowest numbered channel of the

cluster until all channels have been sampled. This is repeated as long as required. Within the

ADC, the sampled data is serialized and made available for further processing by the ADC Pro-

Comm controller.