CP371 16 Channel CompactPCI Analog Input Controller Manual ID: 23762, Rev. Index 02 June 2002 The product described in this manual is in compliance with all applied CE standards.
Preface CP371 Revision History Manual/Product Title: CP371 Manual ID Number: 23762 Rev. Index Brief Description of Changes Board Index Date of Issue 01 Initial Issue 00 Oct 2001 02 Added programming info and specification data 10 June 2002 Imprint Copyright © 2002 PEP Modular Computers GmbH. All rights reserved.
CP371 Preface Table of Contents Revision History ........................................................................................................ ii Imprint ....................................................................................................................... ii Table of Contents ..................................................................................................... iii List of Tables ...................................................................................
Preface CP371 Chapter 2. Functional Description ................................................................................ 2 - 3 2.1 General Information ............................................................................... 2 - 3 2.1.1 Signal Conditioning ....................................................................... 2 - 3 2.1.2 Analog to Digital Converter ........................................................... 2 - 3 2.1.3 ADC ProComm Controller ........................
CP371 Preface Chapter 4. Configuration .............................................................................................. 4 - 3 4.1 Jumper Settings .................................................................................... 4 - 3 4.2 Analog Input Signal Requirements. ....................................................... 4 - 3 4.2.1 Channels ....................................................................................... 4 - 3 4.2.2 Single-ended Input Signals .........
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CP371 Preface List of Tables 1-2 System Relevant Information ................................................................... 1 - 6 1-3 CP371 Main Specifications ...................................................................... 1 - 9 2-1 Pinout of the Analog Input Interface Connector CON2 ............................ 2 - 7 2-2 CPCI Connector CON1 (J1) ..................................................................... 2 - 8 2-3 JTAG Connector (CON3) Pinout ..............................
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CP371 Preface List of Figures 1-1 CP371 System Level Interfacing Diagram ............................................... 1 - 7 1-2 CP371 Front Panel .................................................................................. 1 - 8 1-3 CP371 Board (Front View) ....................................................................... 1 - 8 2-1 CP371 Board Level Interfacing ................................................................
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CP371 Preface Proprietary Note This document contains information proprietary to PEP Modular Computers. It may not be copied or transmitted by any means, disclosed to others, or stored in any retrieval system or media without the prior written consent of PEP Modular Computers GmbH or one of its authorized agents. The information contained in this document is, to the best of our knowledge, entirely correct.
Preface CP371 Explanation of Symbols CE Conformity This symbol indicates that the product described in this manual is in compliance with all applied CE standards. Please refer also to the section “Applied Standards” in this manual. Caution, Electric Shock! This symbol and title warn of hazards due to electrical shocks (> 60V) when touching products or parts of them.
CP371 Preface For Your Safety Your new PEP product was developed and tested carefully to provide all features necessary to ensure its compliance with electrical safety requirements. It was also designed for a long faultfree life. However, the life expectancy of your product can be drastically reduced by improper treatment during unpacking and installation.
Preface CP371 General Instructions on Usage In order to maintain PEP’s product warranty, this product must not be altered or modified in any way. Changes or modifications to the device, which are not explicitly approved by PEP Modular Computers and described in this manual or received from PEP Technical Support as a special handling instruction, will void your warranty.
CP371 Preface Two Year Warranty PEP Modular Computers grants the original purchaser of PEP products a TWO YEAR LIMITED HARDWARE WARRANTY as described in the following. However, no other warranties that may be granted or implied by anyone on behalf of PEP are valid unless the consumer has the express written consent of PEP Modular Computers.
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CP371 Introduction Chapter 0 Introduction ID 23762, Rev.
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CP371 Introduction 1. Introduction 1.1 System Overview The CompactPCI board described in this manual operates with the PCI bus architecture to support additional I/O and memory-mapped devices as required by various industrial applications. For detailed information concerning the CompactPCI standard, please consult the complete Peripheral Component Interconnect (PCI) and CompactPCI Specifications.
Introduction 1.2 CP371 Product Overview The CP371 Analog Input Controller is a part of a comprehensive concept to provide CompactPCI system integrators with a complete range of CompactPCI I/O products which include the functions of analog input, analog output, digital input, and digital output implemented as separate individual boards. This concept ensures a maximum degree of system design flexibility thus allowing efficient and effective usage of available resources.
CP371 Introduction 1.3 Board Overview 1.3.1 Board Introduction The CP371 is a 16 channel (dual cluster, eight channels each) analog input board. The sources of the analog inputs presented to the board may either be a voltage or current generator. The board accepts either single-ended or differential voltages. Currents of up to 20 mA are converted to a single-ended voltage prior to further processing. Input signal processing begins with the presentation of the signal to the front panel connector.
Introduction 1.4 CP371 System Relevant Information The following system relevant information is general in nature but should still be considered when developing applications using the CP371. Table 1-2: System Relevant Information SUBJECT INFORMATION System Configuration The CP371 operates with a system clock frequency of 33 MHz. The number of CP371’s which can be installed in any one system depends solely on the number of CPCI slots available.
CP371 1.5.1 Introduction System Level Interfacing Figure 1-1: CP371 System Level Interfacing Diagram CompactPCI System System Master CPCI - BUS Analog Input System CP371 CP371 n 1 analog input analog input 16 max 1 analog input ID 23762, Rev.
Introduction 1.5.2 CP371 Front Panels Figure 1-2: CP371 Front Panel LEGEND: CP 371 0-7 when LED is active: cluster A is activated 8-15 when LED is active: cluster B is activated 0-7 8-15 1.5.
CP371 1.
Introduction CP371 Table 1-4: CP371 Analog Input Specifications TYPE Input Types / Ranges DESCRIPTION VOLTAGES: Single-ended: 0 to 15 V 0 to 10 V Differential: ± 15 V ± 10 V CURRENTS: 0 to 20 mA 4 to 20 mA Channels Standard: 16 channels total (two clusters of 8 channels each) Optional: 8 channels total (one cluster of 8 channels) Channel Connections Sixteen pairs of dedicated connector pins for plus and minus; sixteen separate pins for configuring on board shunt resistors for current inputs;
CP371 Introduction Table 1-5: CP371 Accuracy BASIC ACCURACY INPUT TYPE and RANGE BASIC ACCURACY (statistically evaluaated) PRODUCTION ACCURACY 1 ACCUMULATING DEVIATION % per K (S and E1 BOARDS ACCUMULATING DEVIATION % per K (E2 BOARDS 0V – 5V < 0.0488 < 0.0006 < 0.0006 0V – 10 V < 0.0244 < 0.0004 < 0.0004 -5V – +5 V < 0.0244 < 0.0004 < 0.0004 - 10 V – + 10 V < 0.0244 < 0.0004 < 0.0004 20 mA < 0.0488 < 0.0006 < 0.0006 0V – 5V < 0.0244 < 0.0004 < 0.0004 0V – 10 V < 0.
Introduction 1.7 CP371 Applied Standards The PEP Modular Computers’ CompactPCI systems comply with the requirements of the following standards: Table 1-6: Applied Standards TYPE CE MECHANICAL ENVIRONMENTAL TESTS 1.8 STANDARD Emission EN50081-1 Immunity, Industrial Environment EN50082-2 Immunity, IT Equipment EN55024 Electrical Safety EN60950 Mechanical Dimensions IEEE 1101.
CP371 Functional Description Chapter 2 Functional Description ID 23762, Rev.
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CP371 2. Functional Description Functional Description The following chapters present more detailed, board level information about the CP371 analog input controller whereby the board components and their basic functionality are discussed in general. 2.
Functional Description 2.1.3 CP371 ADC ProComm Controller Within the CP371, the ADC ProComm controller is responsible for supervising and controlling the analog data acquisition process and providing communications with the CompactPCI system master. Applications address the CP371 through its software driver interface within the system master whereby the controller accepts requests from the driver, executes them accordingly, and supervises the analog to digital conversion process.
CP371 Functional Description Figure 2-1: CP371 Board Level Interfacing CP371 Analog Input Controller CPCI - Interface ADC ProComm Controller CLUSTER B CLUSTER A AD Converter (ADC) AD Converter (ADC) Analog Signal Conditioning Analog Signal Conditioning analog input analog input 8 max 1 analog input ID 23762, Rev.
Functional Description 2.3 System Interfaces 2.3.1 Analog Input Interface CP371 The analog input interface is accomplished through the CON2 connector. The following figure and table indicate the pin layout and pinout of this connector.
CP371 Functional Description Table 2-1: Pinout of the Analog Input Interface Connector CON2 CHANNEL PIN SIGNAL PIN SIGNAL PIN SIGNAL 1 NC 22 NC 43 AGND 15 2 AIN/I 15+ 23 AIN15- 44 I15- 14 3 AIN/I 14+ 24 AIN14- 45 I14- 13 4 AIN/I 13+ 25 AIN13- 46 I13- 12 5 AIN/I 12+ 26 AIN12- 47 I12- 6 AGND 27 AGND 48 AGND 11 7 AIN/I 11+ 28 AIN11- 49 I11- 10 8 AIN/I 10+ 29 AIN10- 50 I10- 9 9 AIN/I 9+ 30 AIN9- 51 I9- 8 10 AIN/I 8+ 31 AIN8- 52 I8- 11
Functional Description 2.3.2 CP371 CPCI Interface and Pinout The CPCI interface is based on the specification PICMG 2.0 R 3.0, 10/1/99. The following figure and table indicate the pin layout and pinout of the CPCI connector, CON1 (J1).
CP371 Functional Description 2.3.3 Test and Program Development 2.3.3.1 JTAG/ISP Interface and Pinout A JTAG/ISP interface is provided on the CP371 for the manufacturer’s use (logic programming, JTAG test). This is a SAMTEC 10-pin, male, dual row connector (0.050” pin pitch). Figure 2-4: JTAG Connector (CON3) 2 10 1 9 Table 2-3: JTAG Connector (CON3) Pinout SIGNAL PIN PIN TCK 1 2 GND TDO 3 4 VCC TMS 5 6 NC NC 7 8 N/C TDI 9 10 GND 2.
Functional Description CP371 late to the operation and performance of the CP371. Overall system integration and compliance with its requirements is beyond the scope of this manual. 2.5.2 Operation M/C Operation M/C is a function of the CP371 driver software and the application. Direct interaction by the operator is limited to the function provided by the cluster activation LED’s (0-7 for cluster A; 8-15 for cluster B).
CP371 Installation Chapter 3 Installation ID 23762, Rev.
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CP371 3. Installation Installation The CP371 has been designed for easy installation. However, the following standard precautions, installation procedures, and general information must be observed to ensure proper installation and to preclude damage to the board or injury to personnel. 3.1 Hardware Installation The product described in this manual can be installed in any available 3U slot of a CompactPCI system except for the system master slot. 3.1.
Installation 3.1.2 CP371 Installation Procedures To install the board proceed as follows: 1. Ensure that the safety requirements indicated above are observed. Warning! Failure to comply with the instruction below may cause damage to the board or result in improper system operation. Please refer to chapters 4 and 5 for configuration information. 2. Ensure that the board is properly configured for operation before installing. Note...
CP371 3.1.3 Installation Removal Procedures To remove the board proceed as follows: 1. Ensure that the safety requirements indicated above are observed. Warning! Care must be taken when applying the procedures below to ensure that when the board is removed it is not damaged through contact with other boards in the system. 2. Disconnect any interfacing cables that may be connected to the board. 3. Loosen both of the front panel retaining screws. 4.
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CP371 Configuration Chapter 4 Configuration ID 23762, Rev.
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CP371 4. Configuration Configuration The following chapters provide information for configuring the CP371 board for operation. 4.1 Jumper Settings The CP371 does not have any jumpers which require configuring. 4.2 Analog Input Signal Requirements. In addition to the input signal types and their ranges which have been specified in chapter 1, system integrators must be aware of the need for certain types of input configuration requirements for the CP371.
Configuration 4.2.3 CP371 Differential Input Signals Signals of this type are required to have connections to plus and minus. Analog ground is a function of the input signal and is connected as required. Refer to the figure below for this type of connection. Figure 4-2: Differential Input Configuration Example for channel 0 • analog ground pin 21 or 42 pin 41 V + + NC CON 2 4.2.
CP371 4.2.5 Configuration Analog Ground Usage Analog ground usage must be carefully considered in order to avoid ground loops or floating signals which can ultimately lead to the degradation of the system performance. The figure below indicates the nominal analog grounding situation, but is, of course, very much subject to the requirements of the application as a whole.
Configuration CP371 4.3 Programming Interface 4.3.1 Access Control Logic All the resources of the CP371 are mapped within the 64KB PCI memory address space which itself is set in the PCI configuration register BAR0. The port size of all local or backend registers is 32-bit by default. The address map of the registers is as follows.
CP371 Configuration Table 4-1: Backend Register Address Map BASE ADDRESS (BAR0) SIZE FUNCTION + 0x3000 4 kB ADC CLUSTER B 0x3400 32 bit ctl_b, Cluster b Common Control Register 0x3C00 32 bit dat_b_0 ADC Data channel # 0 0x3C04 32 bit dat_b_1 ADC Data channel # 1 0x3C08 32 bit dat_b_2 ADC Data channel # 2 0x3C0C 32 bit dat_b_3 ADC Data channel # 3 0x3C10 32 bit dat_b_4 ADC Data channel # 4 0x3C14 32 bit dat_b_5 ADC Data channel # 5 0x3C18 32 bit dat_b_6 ADC Data channel # 6 0x
Configuration 4.3.2 CP371 ADC Control Logic This part of the IO Control Logic controls the communication with the ADC (MAX1270). The ADC integrates 8 channels per chip ( 2 clusters for a total of 16 channels) and has a serial bus interface operating at 2 MHz. ADC operating mode is individually programmable for each channel, i.e. the polarity (unipolar/bipolar) and range (5/10/20V). After initialization of the corresponding ADC Control Registers an Enable Bit must be set to ‘1’.
CP371 4.3.3 Configuration Programming the Board Capability ROM Besides correction data for gain and offset errors other board specific capabilities can be stored in this dedicated onboard ROM. The purpose is that software will be able to configure itself, according to the hardware version (i.e. type, number of channels, insertion of components, input circuit, etc.). The Board Capability ROM is implemented using a 4 KBit serial EEPROM of the type 93LC66 from Microchip.
Configuration CP371 Table 4-7: Opcodes and Commands OPCODE A8 … A0 COMMAND 00 11xxxxxxx EWEN 10 xxxxxxxxx READ 01 xxxxxxxxx WRITE Note: The EWEN (Erase and Write enable) command must be executed once before the first write. Table 4-8: ROM Status Register Bit Map BITS TYPE DEFAULT FUNCTION 31 R/W 0 Busy 30 - 0 R/W 00 reserved Note: As soon as the Startbit is set the Busy/Ready bit becomes active (Busy=1).
CP371 Configuration Table 4-11: Hardware Status Register Bit Map BITS TYPE DEFAULT FUNCTION 31 - 16 R 0 reserved 15 - 8 R 00 HW Version (PCB Index) 7-0 R 01 Logic Version Note: The HW version starts with 0, Logic Version with 1. It will be incremented for each released version. ID 23762, Rev.
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CP371 System Considerations Chapter 5 System Considerations ID 23762, Rev.
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CP371 System Considerations 5. System Considerations 5.1 Introduction In addition to the basic specification requirements for signals being presented to the CP371 which have been addressed in chapter 4, system integrators need to be aware of the overall system environment and the application needs when designing the interfacing to the CP371.
System Considerations 5.4 CP371 Process-side Signal Conditioning Considerations: 1. Input signals presented to the CP371 must be within the ranges specified for the signal type or erroneous results will occur as well as possible damage to the CP371. 2. Ensure that when analog ground pins on CON2 are used that on the process side no grounding loops are created. Refer to chapter 4 for further information. 5.5 Cable Interfacing Considerations: 1. No modification to the CP371 itself is permitted (i.e.
