Owner's manual

AT8904M Hardware Description
Page 3 - 28 AT8904M User Guide
3.3.2 XAUI to XFI Transceivers
The two XAUI to XFI transceivers have a 4-lane XAUI interface with 2.5MHz MDIO manage-
ment interface. They incorporate a fully-integrated clock multiplication unit (CMU), clock and
data recovery (CDR), SerDeses and limiting amplifiers. The transceiver operates in asynchro-
nous clock mode which is provided by the elastic buffers. For configuration options of the trans-
ceivers, refer to the AT8902 CLI Reference Manual.
On the AMC edge connector, AMC channels 4 to 7 map to the XAUI port of the transceiver for
XFP1 and AMC channels 8 to 11 to the transceiver XAUI port for XFP2. The user definable
channel 12 contains the MDIO control connection between the fabric switch and the AMC’s
XAUI to XFI transceivers.
12 MOD_ABS Indicates Module is not present. Grounded in the Module
13 MOD_NR Module Not Ready; Indicating XFP Module Operational
Fault
14 RX_LOS Receiver Loss Of Signal Indicator
15 GND Module Ground
16 GND Ground
17 RD- Transmitter Inverted Data Input
18 RD+ Transmitter Non-Inverted Data Input
19 GND Ground
20 VCC2 +1.8V Power Supply
21 P_DOWN/RST Power down: When high, requires the module to limit
power consumption to 1.5W or below. I²C serial interface
must be functional in the low power mode.
Reset: The falling edge initiates a complete reset of the
module including the I²C serial interface, equivalent to a
power cycle.
22 VCC2 +1.8V Power Supply
23 GND Ground
24 REFCLK+ Reference Clock Non-Inverted Input, AC coupled on the
host board
25 REFCLK- Reference Clock Inverted Input, AC coupled on the host
board
26 GND Module Ground
27 GND Module Ground
28 TD- Receiver Inverted Data Output
29 TD+ Receiver Non-Inverted Data Output
30 GND Module Ground
Table 3-23: XFP Connector Pin Assignment (Continued)
Pin No Signal Description