Owner's manual

Glossary
B-5 AT8404 User Guide
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PHY
PHYsical layer. Generic electronics term referring to a special electronic integrated circuit or
functional block of a circuit that takes care of encoding and decoding between a pure digital
domain (on-off) and a modulation in the analog domain.
PICMG PCI Industrial Computer Manufacturers Group
PICMG® PCI Industrial Computer Manufacturers Group
PLD Programmable Logic Device
PLL Phase Lock Loop
PNE Platform for Network Equipment. A Carrier Grade Linux (4.0) platform.
POR Power-On Reset
POST Power-On Self-Test
RAM Random Access Memory
RHEL Red Hat Enterprise Linux
RoHS Restriction of the Use of Certain Hazardous Substances
ROM
Read Only Memory. Also refers to option ROM or expansion ROM code used during POST to
provide services for specific controllers, such as boot capabilities.
RS-232 (Same as RS232). Recommended Standard 232.
RS232 (Same as RS-232). Recommended Standard 232.
RTC Real Time Clock
RTM Rear Transition Module
RTS Request To Send
SCL Serial CLock
SDR Sensor Data Record
SDRAM Synchronous Dynamic Random Access Memory
SEEPROM Serial EEPROM
SEL System Event Log
SERDES
SERializer/DESerializer. Pair of functional blocks commonly used in high speed communica-
tions. These blocks convert data between serial data and parallel interfaces in each direc-
tion.
SSGMII
Serial Gigabit Media Independent Interface. Standard interface used to connect a Gigabit
Ethernet MAC-block to a PHY.
ShMC Shelf Management Controller
SMB (Same as SMBus/SMBUS). System Management Bus.
SOL Serial Over LAN
SONET Synchronous Optical NETworking
SPI Serial Peripheral Interface
SSH
Secure SHell. A network protocol that allows data to be exchanged over a secure channel
between two computers.
TCLKA Telecom CLocK A. AMC Clock Interface.
TCLKB Telecom CLocK B. AMC Clock Interface.
TCLKC Telecom CLocK C. AMC Clock Interface.
TCLKD Telecom CLocK D. AMC Clock Interface.
TX Transmit
UART Universal Asynchronous Receiver Transmitter
Acronyms Descriptions