User's Manual

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Chapter 5
PCI-1712/1712L User’s Manual
Advantech Co., Ltd.
www.advantech.com
0, 1 and 2. You can choose any counter to be your first cascaded
counter, and the next counter would the next one in the round-robin
order. For example, if you would like to cascade two 16-bit counters
into one 32-bit counter, and you choose counter 1 to be the first
counter then the next counter you choose should be counter 2.
Gate Types and Sources
The gate types and sources you select determine what kind of gate
input signal to enable your counter/timer when receiving clock input. If
the external gate input signal comes in either as logic-low or logic-high
as you have preset, the counter/timer function is enabled, waiting only
for the clock input signal to start counting. The PCI-1712/1712L
provides two gate input types, for which user can set easily through
software or write to bit GPn on register Base+20 to 24:
q Logic-low external gate input:
Enables a counter/timer operation when the external gate signal is
logic-low, and disables the counter/timer operation when the external
gate signal is logic-high.
q Logic-high external gate input:
Enables a counter/timer operation when the external gate signal is
logic-high and disables the counter/timer operation when the external
gate signal is logic-low.
The gate sources are described as below:
q Software Gate:
User can use software to generate the signal to be counter’s gate
input. It helps user to control counter easily through software.
q Previous Counter Output:
User can use previous counter’s output as your gate source. The
previous counter of counter 0 is counter 2, of counter 1 is counter 0
and of counter 2 is counter 1.
q External Gate Source:
User can connect an external gate signal to screw terminal
CNTn_GATE on the PCLD-8712 screw terminal board, where n is the
counter number.