Datasheet

NJM2073
-
4
-
Ver.2004-03-01
(2) Stereo Configuration ( Test Circuit Fig.2 )
PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT
Operating Voltage V
+
1.8 - 15 V
Output Voltage V
O
- 2.7 - V
Operating Current I
CC
R
L
=∞ - 6 9 mA
Input Bias Current I
B
- 100 - nA
Output Power ( Each Channel )
THD=10%,f=1kHz
P
O
V
+
=6V,R
L
=16Ω - 240 - mW
P
O
V
+
=5V,R
L
=8Ω ( Note ) - 270 - mW
P
O
V
+
=4V,R
L
=4Ω ( Note ) 180 250 - mW
P
O
V
+
=3V,R
L
=4Ω - 120 - mW
P
O
V
+
=2V,R
L
=4Ω
THD=1%,f=1kHz
- 30 - mW
P
O
V
+
=4V,R
L
=4Ω - 180 - mW
Total Harmonic Distortion THD V
+
=4V,R
L
=4Ω,P
O
=150mW,f=1kHz - 0.25 -
%
Voltage Gain A
V
f=1kHz 41 44 47 dB
Channel Balance ∆A
V
- - ± 1 dB
Input Impedance Z
IN
f=1kHz 100 - - kΩ
Equivalent Input Noise Voltage V
NI1
R
S
=10kΩ,A Curve - 2.5 - µV
V
NI2
R
S
=10kΩ,B=22Hz~22kHz - 3 - µV
Ripple Rejection RR f=100Hz,C
X
=100µF 24 30 - dB
Cutoff Frequency f
H
A
V
=-3dB from f=1kHz,R
L
=16Ω,P
O
=125mW - 200 - kHz
( Note ) At on PC Board
■ TYPICAL APPLICATION & TEST CIRCUIT
Fig.1 BTL Configuration Fig.2 Stereo Configuration
note:pin No.to D,M-Type