User Manual

VS1003
10 VS1003 REGISTERS
10.9 A/D Modulator Registers
Interrupt registers, prefix AD_
Reg Type Reset Abbrev[bits] Description
0xC01E rw 0 DIV A/D Modulator divider.
0xC01F rw 0 DATA A/D Modulator data.
AD_DIV controls the AD converter’s sampling frequency. To gather one sample, 128 × n clock
cycles are used (n is value of AD_DIV). The lowest usable value is 4, which gives a 48 kHz
sample rate when CLKI is 24.576 MHz. When AD_DIV is 0, the A/D converter is turned off.
AD_DATA contains the latest decoded A/D value.
Version: 1.08, 2014-12-19 49