User Manual
VS1003
9 OPERATION
9 Operation
9.1 Clocking
VS1003 operates on a single, nominally 12.288 MHz fundamental frequency master clock. This
clock can be generated by external circuitry (connected to pin XTALI) or by the internal clock
crystal interface (pins XTALI and XTALO).
9.2 Hardware Reset
When the XRESET -signal is driven low, VS1003 is reset and all the control registers and
internal states are set to the initial values. XRESET-signal is asynchronous to any external
clock. The reset mode doubles as a full-powerdown mode, where both digital and analog parts
of VS1003 are in minimum power consumption stage, and where clocks are stopped. Also
XTALO is grounded.
After a hardware reset (or at power-up) DREQ will stay down for at least 16600 clock cycles,
which means an approximate 1.35 ms delay if VS1003 is run at 12.288 MHz. After this the
user should set such basic software registers as SCI_MODE, SCI_BASS, SCI_CLOCKF, and
SCI_VOL before starting decoding. See section 8.6 for details.
Internal clock can be multiplied with a PLL. Supported multipliers through the SCI_CLOCKF
register are 1.0 × . . . 4.5× the input clock. Reset value for Internal Clock Multiplier is 1.0×. If
typical values are wanted, the Internal Clock Multiplier needs to be set to 3.0× after reset. Wait
until DREQ rises, then write value 0x9800 to SCI_CLOCKF (register 3). See section 8.6.4 for
details.
9.3 Software Reset
In some cases the decoder software has to be reset. This is done by activating bit 2 in
SCI_MODE register (Chapter 8.6.1). Then wait for at least 2 µs, then look at DREQ. DREQ
will stay down for at least 16600 clock cycles, which means an approximate 1.35 ms delay if
VS1003 is run at 12.288 MHz. After DREQ is up, you may continue playback as usual.
If you want to make sure VS1003 doesn’t cut the ending of low-bitrate data streams and you
want to do a software reset, it is recommended to feed 2048 zeros (honoring DREQ) to the SDI
bus after the file and before the reset. This is especially important for MIDI files, although you
can also use SCI_HDAT1 polling.
If you want to interrupt the playing of a WAV, WMA, or MIDI file in the middle, set SM_OUTOFWAV
in the mode register, and wait until SCI_HDAT1 is cleared (with a two-second timeout) before
continuing with a software reset. MP3 does not currently implement the SM_OUTOFWAV be-
cause it is a stream format, thus the timeout requirement.
Version: 1.08, 2014-12-19 37