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VS1003

5 PACKAGES AND PIN DESCRIPTIONS

5.2 LQFP-48 and BGA-49 Pin Descriptions

Pin Name LQFP-

BGA49

Ball

Type

Function

MICP 1 C3 AI Positive differential microphone input, self-biasing

MICN 2 C2 AI Negative differential microphone input, self-biasing

XRESET 3 B1 DI Active low asynchronous reset

DGND0 4 D2 DGND Core & I/O ground

CVDD0 5 C1 CPWR Core power supply

IOVDD0 6 D3 IOPWR I/O power supply

CVDD1 7 D1 CPWR Core power supply

DREQ 8 E2 DO Data request, input bus

GPIO2 / DCLK

9 E1 DIO General purpose IO 2 / serial input data bus clock

GPIO3 / SDATA

10 F2 DIO General purpose IO 3 / serial data input

XDCS / BSYNC

13 E3 DI Data chip select / byte sync

IOVDD1 14 F3 IOPWR I/O power supply

VCO 15 G2 DO For testing only (Clock VCO output)

DGND1 16 F4 DGND Core & I/O ground

XTALO 17 G3 AO Crystal output

XTALI 18 E4 AI Crystal input

IOVDD2 19 G4 IOPWR I/O power supply

IOVDD3 F5 IOPWR I/O power supply

DGND2 20 DGND Core & I/O ground

DGND3 21 G5 DGND Core & I/O ground

DGND4 22 F6 DGND Core & I/O ground

XCS 23 G6 DI Chip select input (active low)

CVDD2 24 G7 CPWR Core power supply

RX 26 E6 DI UART receive, connect to IOVDD if not used

TX 27 F7 DO UART transmit

SCLK 28 D6 DI Clock for serial bus

SI 29 E7 DI Serial input

SO 30 D5 DO3 Serial output

CVDD3 31 D7 CPWR Core power supply

TEST 32 C6 DI Reserved for test, connect to IOVDD

GPIO0 / SPIBOOT 33 C7 DIO General purpose IO 0 / SPIBOOT, use 100 kΩ pull-

down resistor

GPIO1 34 B6 DIO General purpose IO 1

AGND0 37 C5 APWR Analog ground, low-noise reference

AVDD0 38 B5 APWR Analog power supply

RIGHT 39 A6 AO Right channel output

AGND1 40 B4 APWR Analog ground

AGND2 41 A5 APWR Analog ground

GBUF 42 C4 AO Common buffer for headphones

AVDD1 43 A4 APWR Analog power supply

RCAP 44 B3 AIO Filtering capacitance for reference

AVDD2 45 A3 APWR Analog power supply

LEFT 46 B2 AO Left channel output

AGND3 47 A2 APWR Analog ground

LINEIN 48 A1 AI Line input

First pin function is active in New Mode, latter in Compatibility Mode.

Unless pull-down resistor is used, SPI Boot is tried. See Chapter 9.5 for details.

Version: 1.08, 2014-12-19 13