Operator Manual Firmware Ver.3.05 and higher Instruction Manual

B-32 BOP-1KW-GL 022814
B.113 STATus:OPERation:ENABle COMMAND STAT:OPER:ENAB
Syntax: Short Form: STAT:OPER:ENAB <int_value>
Long Form: STATus:OPERation:ENABle <int_value>
Description: Sets Operation Enable Register. The Operation Enable Register is a mask for enabling specific bits
in the Operation Event Register which will cause the operation summary bit (bit 7) of the Status Byte
register to be set Bit set to 1 = function enabled (active, true); bit reset to 0 = function disabled (inac-
tive, false). The operation summary bit is the logical OR of all the enabled bits in the Operation Event
register. (See example, Figure B-11.)
B.114 STATus:OPERation:ENABle? QUERY STAT:OPER:ENAB?
Syntax: Short Form: STAT:OPER:ENAB? Long Form: STATus:OPERation:ENABle?
Return Value: <int_value>
Description: Reads Operation Enable Register (see Table B-3). Returns value of Operation Enable Register bits.
Bit set to 1 = function enabled (active, true); bit reset to 0 = function disabled (inactive, false). (See
example, Figure B-11.)
B.115 STATus:OPERation[:EVENt] QUERY STAT:OPER?
Syntax: Short Form: STAT:OPER[:EVEN]? Long Form: STATus:OPERation[:EVENt]?
Return Value: <int_value>
Description: Indicates changes in conditions monitored by Operational Event Register (see Table B-3).
Returns the value of the Operation Event register. The Operation Event register is a read-only register
which holds (latches) all events that occur. Reading the Operation Event register clears it. (See exam-
ple, Figure B-11.)
B.116 STATus:PRESet COMMAND STAT:PRES
Syntax: Short Form: STAT:PRES Long Form: STATus:PRESet
Description: Disables reporting of all status events. This command sets the Operation Enabled Register (Table
B-3) to 8193 and the Questionable Register to 255. (See example, Figure B-11.)
B.117 STATus:QUEStionable[:EVENt]? QUERY STAT:QUES?
Syntax: Short Form: STAT:QUES[EVEN]? Long Form: STATus:QUEStionable[EVENT]?
Return Value: <int_value> actual register value
Description: Indicates the latched condition of the Questionable Event register. Returns the value of the
Questionable Event register (see Table B-4). The Questionable Event register is a read-only register
which holds (latches) all events. Only bits 13 and 12 are latched in the Status Questionable Event reg-
ister. Bits 0 and 1 of the Status Questionable Condition Register are not latched in the power supply.
Reading the Questionable Event register clears it. (See example, Figure B-11.)
B.118 STATus:QUEStionable:CONDition? QUERY STAT:QUES:COND?
Syntax: Short Form: STAT:QUES:COND? Long Form: STATus:QUEStionable:CONDition?
Return Value: <int_value> actual register value
Description: Returns the value of the Questionable Condition Register (see Table B-4). The Questionable
Condition Register contains unlatched real-time information about questionable conditions of the
power supply. Bit set to 1 = condition (active, true); bit reset to 0 = condition (inactive, false). Bits 1 or
0 may be both be set, indicating the power supply is settling after a voltage change. (See example,
Figure B-11.)
TABLE B-4. QUESTIONABLE EVENT REGISTER, QUESTIONABLE CONDITION REGISTER
AND QUESTIONABLE CONDITION ENABLE REGISTER BITS
CONDITION NU SINK CE VE NU SE NU TE NU CM VM
BIT 15 14 13 12 11 - 7 65-43210
VALUE 32,768 16,359 8192 4096 2048 - 128 64 32-16 8 4 2 1
CE Current Error
CM Current Mode Error
NU Not Used
SE Slave Error
SINK Power Supply absorbing energy from load
TE Thermal Error
VE Voltage Error
VM Voltage Mode Error