Owner's manual
Table Of Contents
- SECTION 1 - INTRODUCTION
- SECTION 2 - INSTALLATION
- SECTION 3 - CALIBRATION
- SECTION 4 - OPERATION
- FIGURE 1-1. Remotely Controlled Power Supply Configurations Using Kepco Products
- SECTION 1 - INTRODUCTION
- 1.1 Scope of Manual
- 1.2 General Description
- TABLE 1-1. Kepco BIT 488, BIT 4882, and BIT 4886 Digital Programming Cards
- TABLE 1-2. Applicability of BIT 4882, 4882-F and BIT 4886 Cards to Specific BOP Models
- 1.3 Specifications, BIT 4882, BIT 4882-F and BIT 4886
- TABLE 1-3. Specifications, BIT 4882, BIT 4882-F AND BIT 4886
- SECTION 2 - INSTALLATION
- 2.1 Unpacking and Inspection
- 2.2 Set Start-up DefaultS
- 2.2.1 Set (GPIB) Device Address
- 2.2.2 Start-up Language Default
- 2.2.3 IEEE Cable Shield Ground Selection
- 2.2.4 Set Power Supply Identification Switch
- FIGURE 2-1. BIT 4882 and BIT 4882-F Switch and Adjustment Locations
- TABLE 2-1. Power Supply Identification Switch S2 Setting
- 2.3 Installation of Interface Card into the BOP
- TABLE 2-2. Device Address Selection
- FIGURE 2-2. Installation of Model BIT 4882-f into BOP
- FIGURE 2-3. Installation of Model BIT 4882 into BOP
- 2.4 Input/OUtput Signals
- TABLE 2-3. Input/Output Pin Assignments
- FIGURE 2-4. IEEE 488 (GPIB) Connector
- SECTION 3 - CALIBRATION
- 3.1 Equipment Required
- 3.2 Adjustment of the Bop ±10 Volt Calibration Controls (R31, R32)
- 3.3 Adjustment of the Ammeter Zero (R50)
- FIGURE 3-1. BOP Power Supply, Internal Calibration Control Locations
- 3.4 Adjustment Of The Output Voltage Zero (R81)
- 3.5 Adjustment of the Full Scale Output Voltage (R21)
- TABLE 3-1. BOP Power Supply, Internal Calibration Controls
- 3.6 Voltage Reading Zero Calibration (R35)
- 3.7 Voltage Reading Calibration (R19)
- 3.8 Adjustment of the Output Current Zero (R83)
- 3.9 Adjustment of the Full Scale Output Current (R22)
- 3.10 Current Reading Zero Calibration (R36)
- TABLE 3-2. Calibration Measurements and Tolerances - Current
- TABLE 3-3. Suggested Sense Resistors
- FIGURE 3-2. Current Shunt Connections
- 3.11 Current Reading Calibration (R20)
- SECTION 4 - OPERATION
- 4.1 General
- 4.2 IEEE 488 (GPIB) Bus Protocol
- TABLE 4-1. IEEE 488 (GPIB) Bus Interface Functions
- TABLE 4-2. IEEE 488 (GPIB) Bus Command Mode Messages
- TABLE 4-3. IEEE 488 (GPIB) Bus Data Mode Messages
- 4.3 SCPI Programming
- 4.3.1 SCPI Messages
- 4.3.2 Common Commands/Queries
- 4.3.3 SCPI Subsystem Command/Query Structure
- FIGURE 4-1. Tree Diagram of SCPI Commands Used with BIT 4882, BIT 4882-F and BIT 4886 Interface Card
- 4.3.4 Program Message Structure
- TABLE 4-4. SCPI Command Index
- 4.3.4.1 Keyword
- TABLE 4-5. Rules Governing Shortform Keywords
- FIGURE 4-2. Message Structure
- 4.3.4.2 Keyword Separator
- 4.3.4.3 Query Indicator
- 4.3.4.4 Data
- 4.3.4.5 Data Separator
- 4.3.4.6 Message Unit Separator
- 4.3.4.7 Root Specifier
- 4.3.4.8 Message Terminator
- 4.3.5 Understanding The Command Structure
- 4.3.6 Program Message Syntax Summary
- 4.3.7 SCPI Program Example
- FIGURE 4-3. Typical Example of Interface Card Program Using SCPI Commands
- 4.4 CIIL Programming
- APPENDIX A - SCPI COMMON COMMAND/QUERY DEFINITIONS
- TABLE A-1. IEEE 488.2 Command/query Index
- A.2 *CLS — Clear Status Command
- A.3 *ESE — Standard Event Status Enable Command
- TABLE A-2. Standard Event Status Enable Register and Standard Event Status Register Bits
- A.4 *ESE? — Standard Event Status Enable Query
- A.5 *ESR? — Event Status Register Query
- A.6 *IDN? — Identification Query
- A.7 *OPC — Operation Complete Command
- A.8 *OPC? — Operation Complete Query
- A.9 *RST — Reset Command
- FIGURE A-1. GPIB Commands
- A.10 *SRE — Service Request Enable Command
- TABLE A-3. Service Request Enable and Status Byte Register Bits
- A.11 *SRE? — Service Request Enable Query
- A.12 *STB? — Status Byte Register Query
- A.13 *TRG — Trigger Command
- A.14 *TST? — Self Test Query
- A.15 *WAI — Wait-To-Continue Command
- APPENDIX B - SCPI COMMAND/QUERY DEFINITIONS
- B.1 Introduction
- TABLE B-1. SCPI Subsystem Command/query Index
- B.2 INITiate[:IMMediate] Command
- B.3 INITiate:CONTinuous Command
- B.4 INITiate:CONTinuous Query
- FIGURE B-1. Programming the Output
- B.5 MEASure[:SCALar]:CURRent[:DC]? Query
- B.6 MEASure:VOLTage[:SCALar][:DC]? Query
- B.7 [SOURce:]CURRent[:LEVel][:IMMediate][:AMPlitude] Command
- B.8 [SOURce:]CURRent[:LEVel][:IMMediate][:AMPlitude] Query
- B.9 [SOURce:]CURRent:[:LEVel]TRIGgered[:AMPlitude] Command
- B.10 [SOURce:]CURRent:[:LEVel]TRIGgered[:AMPlitude]? Query
- B.11 .[SOURce:]VOLTage[:LEVel][:IMMediate][:AMPlitude] Command
- B.12 [SOURce:]VOLTage[:LEVel][:IMMediate][:AMPlitude]? Query
- B.13 [SOURce:]VOLTage:[:LEVel]TRIGgered[:AMPlitude] Command
- B.14 [SOURce:]VOLTage:[:LEVel]TRIGgered[:AMPlitude]? Query
- B.15 [SOURce:]FUNCtion:MODE
- B.16 STATus:OPERation:CONDition Query
- TABLE B-2. Operation Condition Register, Operation Enable Register, and Operation Event Register ...
- B.17 STATus:OPEReration:ENABle Command
- B.18 STATus:OPEReration:ENABle? Query
- B.19 STATus:OPERation[:EVENt] Query
- B.20 STATus:PRESet Command
- B.21 STATus:QUEStionable[:EVENt]? Query
- TABLE B-3. Questionable Event Register, Questionable Condition Register and Questionable Conditio...
- B.22 STATus:QUEStionable:CONDition? Query
- FIGURE B-2. Using Status Commands and Queries
- B.23 STATus:QUEStionable:ENABle Command
- B.24 STATus:QUEStionable:ENABle? Query
- B.25 SYSTem:ERRor? Query
- TABLE B-4. Error Messages
- B.26 SYSTem:LANGuage Command
- B.27 SYSTem:VERSion Query
- FIGURE B-3. Using System Commands and Queries
- APPENDIX C - CIIL COMMAND DEFINITIONS
- TABLE C-1. CIIL Subsystem Command/query Index
- FIGURE C-1. FNC — Function Command
- FIGURE C-2. INX — Initiate Op Code Command
- FIGURE C-3. FTH — Fetch Command
- FIGURE C-4. SET Command
- FIGURE C-5. RST — Reset Command
- FIGURE C-6. CNF, IST — Confidence Test, Internal Self Test Commands
- TABLE C-2. CIIL Error Messages
- FIGURE C-7. STA — Status Command
- TABLE C-3. CIIL Error Handling Utility Commands
- FIGURE C-8. GAL — Go to alternate Language Command

BIT 4882 030507 B-5
Description: Sets Operation Enable Register. The Operation Enable Register is a mask for enabling specific bits
in the Operation Event Register which will cause the operation summary bit (bit 7) of the Status Byte
register to be set Bit set to 1 = function enabled (active, true); bit reset to 0 = function disabled (inac-
tive, false). The operation summary bit is the logical OR of all the enabled bits in the Operation Event
register. (See example, Figure B-2.)
B.18 STATus:OPEReration:ENABle? QUERY STAT:OPER:ENAB?
Syntax: Short Form: STAT:OPER:ENAB? Long Form: STATus:OPERation:ENABle?
Return Value: <int_value> 0 to 1313 (1 + 32 + 256 + 1024).
Description: Reads Operation Enable Register (see Table B-2). Returns value of Operation Enable Register bits.
Bit set to 1 = function enabled (active, true); bit reset to 0 = function disabled (inactive, false). (See
example, Figure B-2.)
B.19 STATus:OPERation[:EVENt] QUERY STAT:OPER?
Syntax: Short Form: STAT:OPER[:EVEN]? Long Form: STATus:OPERation[:EVENt]?
Return Value: <int_value> 0 to 1313 (1 + 32 + 256 + 1024).
Description: Indicates changes in conditions monitored by Operational Event Register (see Table B-2).
Returns the value of the Operation Event register. The Operation Event register is a read-only register
which holds (latches) all events that occur. Reading the Operation Event register clears it. (See exam-
ple, Figure B-2.)
B.20 STATus:PRESet COMMAND STAT:PRES
Syntax: Short Form: STAT:PRES Long Form: STATus:PRESet
Description: Disables reporting of all status events. This command sets all bits of the Operation Condition
(Table B-2) and Questionable Condition Registers to 0, preventing all status events from being
reported. (See example, Figure B-2.)
B.21 STATus:QUEStionable[:EVENt]? QUERY STAT:QUES?
Syntax: Short Form: STAT:QUES[EVEN]? Long Form: STATus:QUEStionable[EVENT]?
Return Value: <int_value> actual register value
Description: Indicates questionable events that occurred since previous STAT:QUES? query. Returns the
value of the Questionable Event register (see Table B-3). The Questionable Event register is a
read-only register which holds (latches) all events. Reading the Questionable Event register clears it.
(See example, Figure B-2.)
B.22 STATus:QUEStionable:CONDition? QUERY STAT:QUES:COND?
Syntax: Short Form: STAT:QUES:COND? Long Form: STATus:QUEStionable:CONDition?
Return Value: <int_value> actual register value
Description: Returns the value of the Questionable Condition Register (see Table B-3). The Questionable
Condition Register contains unlatched real-time information about questionable conditions of the
power supply. Bit set to 1 = condition (active, true); bit reset to 0 = condition (inactive, false). (See
example, Figure B-2.)
TABLE B-3. QUESTIONABLE EVENT REGISTER, QUESTIONABLE CONDITION REGISTER
AND QUESTIONABLE CONDITION ENABLE REGISTER BITS
CONDITION NU PL OL RE NU NU NU NU NU OT NU CE VE
BIT 15-12111098 76543210
VALUE
32,768
- 4096
2048 1024 512 256 128 64 32 16 8421
PL POWER LOSS
OL OVERLOAD
RE RELAY ERROR
OT OVERTEMPERATURE
CE CURRENT ERROR
VE VOLTAGE ERROR
NU NOT USED