Datasheet

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A GREATER MEASURE OF CONFIDENCE
Triggering and I/O Capabilities
SWITCH/MEASURE SYSTEMS
11
Integra Series Multimeter/Switch Systems
Triggering and I/O Capabilities
Trigger sources
Any of the following sources can be used for triggering a reading or scan sequence:
A. Immediate: An Integra Series system self-triggers automatically. This default method is the simplest
way to take a measurement on a single channel.
B. An external trigger is received via the Trigger Link connector. Triggering through Trigger Link
is very precise (<0.5ms trigger latency) and provides tight timing control for synchronization
in larger systems. Therefore, measurements can be taken at a precise time with very little uncertain-
ty. This capability can be valuable when optimizing coordination with other system instruments, such
as the Model 2400 SourceMeter
®
instrument in larger rack & stack applications.
C. A bus trigger is received (GET or *TRG) on GPIB or *TRG on RS-232 and Ethernet.
D. Manual: Use of front panel TRIG key.
E. Analog trigger: A display reading on a particular channel can be programmed as an analog trigger. A
scan sequence is started whenever such a reading is reached [programmed for either a greater than
(>) or less than (<) condition as a trigger]. In other words, this feature can be used to initiate a scan
sequence based on some external factor, such as a temperature rising above a pre-set limit. After scan-
ning all the configured channels on the instrument, the instrument then returns to the channel that
acted as the analog trigger, and checks for the reading to be in conditional limits. Depending on the
limits and current reading, the instrument decides whether to start the next scan. Only the data of
interest are acquired, eliminating the need to spend hours searching through reams of normal read-
ings to find anomalous data.
F. Digital trigger: Two digital inputs (TTL-level) are standard on each mainframe—one
to serve as a trigger input and one to serve as a hardware interlock. The digital trigger is logical “and”-
ed with the interlock. The interlock is default true. Therefore, the digital trigger input would be recog-
nized for triggering only when the digital trigger and the interlock are both true. Thus, the interlock
provides the user with a controlling mechanism for recognizing the digital trigger if necessary (see
Figure 3).
Value
Time
Scan
B
C
D
E
F
Hardware
Interlock
Trigger
Event
To Integra Series System
Microprocessor
Figure 3