User's Manual
Table Of Contents
- 1 Document information
- 2 Hardware design block diagram
- 3 Power Consumption
- 4 Hardware capabilities
- 5 Connector datasheet
- 6 PCB production information
Page:10
Figure 10 DCDC:5V to VCC_CPU circuit diagram
4.2.4 DCDC:5V to VDD_GPU
VCC_SYS(5V) to VDD_GPU with SYR838 BUCK DCDC. The SYR838 is I2C programmable to regulate
the output voltage from 0.7125V to 1.5V.
Table 9 DCDC:5V to VDD_GPU Functional Table
Functional classes Feature description illustrate
1 Input properties The system input voltage is 2.6V-5.5V,normal operation YES
2 Output properties Demand ID: Load current
＜6A
3 Output properties Ripple + noise
＜5%
6 other Switching frequency 2.4MHz
7 other IO enable YES
8 Input properties 5V Input Ripple + Noise <5%
9 other The output voltage is programmable YES
Figure 11 DCDC:5V to VCC_GPU Circuit Diagram
4.2.5 3.3V generates VCC_Flash(1.8V) through the LDO
VCC_IO (3.3V) is generated by DCDC2 of the PMU chip and VCC_Flash by the LDO chip BL9198-
18BAPRN to provide to flash circuits.
Table 10 LDO:3.3V to 1.8V Function Table