Datasheet

VDD side of the resistor or by fitting a Schottky diode on this line as
per note 1.
3) The 100nF capacitor shown on this pin is optional for HVP but we do
recommend that a capacitor is fitted if possible to avoid glitches on
MCLR. This is the maximum value, and we recommend something
smaller. Larger capacitors may prevent the PIC from entering HVP
mode. Do not fit for LVP mode.
4) If possible, the Clock and Data lines should be dedicated to ICSP but
where this is undesirable, the application circuit should be isolated
from the data and clock lines with series resistors, above 10K. This is
especially important if either of these lines forces the pin as an input
or output. In exceptional cases, series resistors may not be sufficient
and a 4053 multiplexer or similar circuit should be used.
Capacitors on these lines should be avoided if at all possible. If they
are needed, for noise immunity for example, then the maximum
capacitance the programmer can handle is 1nF.
5) If LVP mode is used, this resistor must be fitted.
6) This line is only needed for Low Voltage Programming – LVP mode.
7) PIC18F J parts need a decoupling capacitor between VccCore pin and
Ground, typically 100nF
High Voltage Programming
The High Voltage Programming method or HVP mode uses 12V on the
MCLR/VPP pin to enter programming mode. The programmer includes a
12V generator circuit that supplies this voltage.
There are two methods of entering HVP mode, Vpp before Vdd and Vdd
before Vpp. Both methods are available on some PIC devices, but others
only have one of the methods. The programmer will use Vpp first if it is
available as it has advantages such as being independent of code in the
PIC. This method will only work if the target is NOT powered.
The PGM line does not need to be connected for HVP mode.
The programming mode must be set to High Voltage Programming (HVP)
in the software.