Projector Service Manual
Table Of Contents
- DECLARATION OF CONFORMITY
- BZSAFE.PDF
- CH1INTRO.PDF
- CH2SYSDE.PDF
- Functional Descriptions
- Contents
- Cover and Base
- External Power Requirements
- Electronics Systems Overview
- System Power
- Card Cage
- Circuit Boards
- Raster Timing Generator Board (RTG) p/n 100568
- Sync Generator
- Sync Detector and Selector
- Serration and Equalization Lockout
- Phase Locked Loop
- VSYNC Detector, Field Separator, and Mux
- Adjustment Counters
- Serial Communication
- Raster Timing Generator I/O
- Interlocks and Protection
- Horizontal Deflection Board P/N 102523 (HDB)
- Vertical Oscillator
- Horizontal Phase Locked Loop
- Horizontal Centering
- Horizontal Power Supply
- Flyback Switching
- Geometric Correction
- Output Section
- Horizontal Sweep Failure Detection
- Serial Communication
- Horizontal Deflection Board I/O
- Interlocks and Protection
- Vertical Deflection Board P/N 102521(VDB)
- Vertical Preamps
- Vertical Amplifiers
- Sweep Failure Detection
- Side Pincushion and Keystone Correction
- Horizontal Linearity Correction
- Top and Bottom Pincushion and Keystone Correction
- Correction Amplifiers
- Serial Communication
- General I/O
- Interlocks and Shutdowns
- Video Processor Board P/N 104672 (VPB)
- Decoder
- Video/Sync Mux
- V & H Sync Strip
- SG Sync Strip
- B, G, and R Brightness and Contrast Amplifiers
- On-Screen Switch
- Gamma Correction
- Switch Logic and Video Enable
- RGB Sensitivity and Threshold Amplifier
- ILA® Bias
- Dynamic Focus Amplifier
- Serial Communication
- General I/O
- Interlocks and Protection
- Video Amplifier Board P/N 103567 or 103774 (VAB)
- Video Signal
- Failure Detection
- Beam Current Sense
- DC Restore
- Arc Protection
- Blanking
- Enable Circuit
- Focus
- Filament Supply
- General I/O
- System Controller Board P/N 104668 (SCB)
- General Functional Description
- CPU
- Working and Compressed Memory
- Expanded Memory
- Correction Address Generator
- DACs
- DSP
- Overlay Memory
- Overlay Address Generator
- Overlay Interface
- LED Display Buffers and Logic
- RS232 Interface
- IR Interface
- IIC Interface
- Serial Interface
- General I/O
- Backplane Board p/n 100571
- Optical Section
- Image Light Amplifier
- Functional Descriptions
- CH3ADJST.PDF
- CH4MAINT.PDF
- Maintenance Remove/Replace)
- Contents
- Introduction
- Projector Covers
- Ventilation Filters
- Arc Lamp Assembly
- System Power Supply
- Electronics Module
- Cathode Ray Tube (CRT)
- Video Amplifier Board (VAB)
- CRT Yoke
- High Voltage Power Supply (HVPS)
- Card Cage (Printed Circuit Boards)
- Image Light Amplifier Assembly
- Projection Lens
- (SCB) Socket Battery Replacement
- Recommended Spares
- Maintenance Remove/Replace)
- CH5TRBSH.PDF
- HGLOSS.PDF

Chapter 2—Functional Descriptions
2-64 Model 330. 340SC, and 370SC Service Manual
drives the correction amplifiers. The raw (compressed) data is stored in the WCM
while the smooth (expanded) data is stored in the EXM.
When a channel change occurs in the projector, the compressed correction data
that is stored in the WCM is interpolated by the DSP into the expanded form that
is stored in the Expanded Memory.
The compressed data is stored in the WCM in a 33X33 matrix of values
representing the desired correction over the whole screen. For each channel, there
are twelve (12) of these matrices stored in the WCM; one (1) for each color of
each function (R, G, and B for each of X registration, Y registration, Threshold,
and Sensitivity).
Overlay Memory
All display that does not originate from the external source is called Overlay and
includes on-screen text and test patterns. In order to produce overlays, a bit-map
must be generated that can be read out as the raster is being produced by the
projector’s deflection circuits. This bit-map tells what to show on the screen at
any point at any time. The CPU generates the bit-map and stores it in the overlay
memory for readout during raster scanning. When there is no overlay to be
presented, there is nothing but external video to show. That information is also
stored in the overlay memory.
The Overlay Memory is composed of two SRAMs. They are not battery backed
since they store no data that must be held while the projector is not in operation.
The Overlay Memory is used to store the bit-mapped information that describes
the overlay pattern that is seen on the faces of the CRTs, hence on the screen. The
overlay bit-map is 192 fields wide (out of 224) by the total number of raster lines.
Each of these memory locations stores information that determines what will be
displayed at that particular point on the screen. These choices are full bright or
black for each color individually, gray scale for all three (3) colors together, or
external video for all three (3) colors.
Overlay Address Generator
The Overlay Address Generator is used to address the overlay memory in a
manner similar to how the correction address generator addresses the EXM during
both load and readout.
The CPU controls the operation of the Overlay Address Generator while writing
to the overlay memory. During the read times, as with the correction generator,
the overlay address generator uses the /CORRSTRT and /MAPST signals from
the RTG as timing signals. However, the timing clock used is the /HX224 signal.
This is because the generator must run at 224 times the H frequency in order to be
able to generate the 192 addresses required for each line of overlay.
The addresses are generated for 192 clock pulses then the generator pauses. After
the next /CORRSTRT signal, it generates another 192 addresses. This repeats for










