Projector Service Manual
Table Of Contents
- DECLARATION OF CONFORMITY
- BZSAFE.PDF
- CH1INTRO.PDF
- CH2SYSDE.PDF
- Functional Descriptions
- Contents
- Cover and Base
- External Power Requirements
- Electronics Systems Overview
- System Power
- Card Cage
- Circuit Boards
- Raster Timing Generator Board (RTG) p/n 100568
- Sync Generator
- Sync Detector and Selector
- Serration and Equalization Lockout
- Phase Locked Loop
- VSYNC Detector, Field Separator, and Mux
- Adjustment Counters
- Serial Communication
- Raster Timing Generator I/O
- Interlocks and Protection
- Horizontal Deflection Board P/N 102523 (HDB)
- Vertical Oscillator
- Horizontal Phase Locked Loop
- Horizontal Centering
- Horizontal Power Supply
- Flyback Switching
- Geometric Correction
- Output Section
- Horizontal Sweep Failure Detection
- Serial Communication
- Horizontal Deflection Board I/O
- Interlocks and Protection
- Vertical Deflection Board P/N 102521(VDB)
- Vertical Preamps
- Vertical Amplifiers
- Sweep Failure Detection
- Side Pincushion and Keystone Correction
- Horizontal Linearity Correction
- Top and Bottom Pincushion and Keystone Correction
- Correction Amplifiers
- Serial Communication
- General I/O
- Interlocks and Shutdowns
- Video Processor Board P/N 104672 (VPB)
- Decoder
- Video/Sync Mux
- V & H Sync Strip
- SG Sync Strip
- B, G, and R Brightness and Contrast Amplifiers
- On-Screen Switch
- Gamma Correction
- Switch Logic and Video Enable
- RGB Sensitivity and Threshold Amplifier
- ILA® Bias
- Dynamic Focus Amplifier
- Serial Communication
- General I/O
- Interlocks and Protection
- Video Amplifier Board P/N 103567 or 103774 (VAB)
- Video Signal
- Failure Detection
- Beam Current Sense
- DC Restore
- Arc Protection
- Blanking
- Enable Circuit
- Focus
- Filament Supply
- General I/O
- System Controller Board P/N 104668 (SCB)
- General Functional Description
- CPU
- Working and Compressed Memory
- Expanded Memory
- Correction Address Generator
- DACs
- DSP
- Overlay Memory
- Overlay Address Generator
- Overlay Interface
- LED Display Buffers and Logic
- RS232 Interface
- IR Interface
- IIC Interface
- Serial Interface
- General I/O
- Backplane Board p/n 100571
- Optical Section
- Image Light Amplifier
- Functional Descriptions
- CH3ADJST.PDF
- CH4MAINT.PDF
- Maintenance Remove/Replace)
- Contents
- Introduction
- Projector Covers
- Ventilation Filters
- Arc Lamp Assembly
- System Power Supply
- Electronics Module
- Cathode Ray Tube (CRT)
- Video Amplifier Board (VAB)
- CRT Yoke
- High Voltage Power Supply (HVPS)
- Card Cage (Printed Circuit Boards)
- Image Light Amplifier Assembly
- Projection Lens
- (SCB) Socket Battery Replacement
- Recommended Spares
- Maintenance Remove/Replace)
- CH5TRBSH.PDF
- HGLOSS.PDF
Chapter 2—Functional Description
Model 330, 340SC and 370SC Service Manual 2-45
further use in the Video Processor Board. The IIC bus is used by the decoder to
select either Channel 3 (NTSC) or Channel 4 (S-Vid). The two (2) signals are
multiplexed together on the decoder board for export to the Video/Sync Mux.
Video/Sync Mux
The Video/Sync Mux selects one (1) of three (3) external inputs (RGB1, RGB2,
or Decoder) for use as the source for Image display and sync signals. The two (2)
external RGB Sync signals are selected by choosing RGB1 or RGB2 in the
C
HANNEL
L
IST
under the C
HANNEL
M
ENU
. Selecting either CVID (for the
composite input) or SVHS (for the S-Vid input) from the same C
HANNEL
L
IST
uses the input from the decoder. The input to be used is selected by the System
Controller Board via the IIC bus. A green LED on the input panel is lit to indicate
which input is selected. The RGB image inputs are AC coupled while the sync
and decoder inputs are DC coupled. All inputs have a 75 ohm input impedance.
V & H Sync Strip
The vertical and horizontal sync signals are taken from the Video/Sync Mux and
individually peak and trough detected then pulse shaped to provide a TTL-level
signal representing the HSYNC and the VSYNC. Those signals are then sent out
to the RTG as the signals HSYNC and VSYNC and can be monitored on TP 14
and 15 respectively.
SG Sync Strip
The SG Sync Strip circuit looks at the green image signal between the video
MUX and the Brightness and Contrast Amp and sends the signal through a buffer
then peak detects the signal. The peak-detected signal then is compared with a
reference voltage to discriminate the sync signal from the video. The stripped sync
signal is then pulse shaped to provide a TTL representation of the composite sync
signal. The signal is sent out to the RTG as SGSYNC and can be probed at TP 13.
B, G, and R Brightness and Contrast Amplifiers
Each color of video (R, G, and B) uses an identical circuit. The Brightness and
Contrast amplifier serves to adjust the black and white levels of the external video
and also protects the CRT from excessive beam current by taking the beam
current signal from the Video Output Amp and comparing it with a reference. If
the beam current exceeds 1mA, the contrast command voltage is reduced to a
level that brings the CRT beam current back within bounds.
The Brightness and Contrast amplifier takes the contrast command signal after the
beam current limit circuit, and uses it to set the gain of the amplifier for contrast
control. Contrast is controlled by the SCB via the IIC interface. The operator
controls contrast level by pressing the C
ONT
button and using the up and down
arrows on the remote control. Green is a master and will control all three (3)
colors together. R and B are independent.